diff options
| author | Greg Ungerer <gerg@uclinux.org> | 2012-09-17 08:51:20 +0200 |
|---|---|---|
| committer | Greg Ungerer <gerg@uclinux.org> | 2012-09-27 15:34:01 +0200 |
| commit | f2f41c68eabfb32574f9088135480618206dd432 (patch) | |
| tree | 9ad4275732b742d8be36eb862b922d937f491520 /arch/m68k/include | |
| parent | m68knommu: use read/write IO access functions in ColdFire m532x setup code (diff) | |
| download | linux-f2f41c68eabfb32574f9088135480618206dd432.tar.xz linux-f2f41c68eabfb32574f9088135480618206dd432.zip | |
m68knommu: move ColdFire slice timer address defiens to 54xx header
Move the base address defines of the ColdFire 54xx CPU slice timers into the
54xx specific header (m54xxsim.h). They are CPU specific, and belong with the
CPU specific defines. Also make them relative to the MBAR peripheral region,
making the define the absolute address.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include')
| -rw-r--r-- | arch/m68k/include/asm/m54xxsim.h | 6 | ||||
| -rw-r--r-- | arch/m68k/include/asm/mcfslt.h | 7 |
2 files changed, 6 insertions, 7 deletions
diff --git a/arch/m68k/include/asm/m54xxsim.h b/arch/m68k/include/asm/m54xxsim.h index d3c5e0dbdadf..d6a50799ff27 100644 --- a/arch/m68k/include/asm/m54xxsim.h +++ b/arch/m68k/include/asm/m54xxsim.h @@ -47,6 +47,12 @@ #define MCF_IRQ_UART3 (MCFINT_VECBASE + 32) /* + * Slice Timer support. + */ +#define MCFSLT_TIMER0 (MCF_MBAR + 0x900) /* Base addr TIMER0 */ +#define MCFSLT_TIMER1 (MCF_MBAR + 0x910) /* Base addr TIMER1 */ + +/* * Generic GPIO support */ #define MCFGPIO_PIN_MAX 0 /* I am too lazy to count */ diff --git a/arch/m68k/include/asm/mcfslt.h b/arch/m68k/include/asm/mcfslt.h index d0d0ecba5333..c2314b6f8caa 100644 --- a/arch/m68k/include/asm/mcfslt.h +++ b/arch/m68k/include/asm/mcfslt.h @@ -13,13 +13,6 @@ /****************************************************************************/ /* - * Get address specific defines for the 547x. - */ -#define MCFSLT_TIMER0 0x900 /* Base address of TIMER0 */ -#define MCFSLT_TIMER1 0x910 /* Base address of TIMER1 */ - - -/* * Define the SLT timer register set addresses. */ #define MCFSLT_STCNT 0x00 /* Terminal count */ |