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authorLinus Torvalds <torvalds@linux-foundation.org>2012-07-25 02:20:51 +0200
committerLinus Torvalds <torvalds@linux-foundation.org>2012-07-25 02:20:51 +0200
commit2c05b2c838e7adaabb7265ad5d5b632315c20821 (patch)
treecb29c9de665f216825a7932afb7c6329ab9ae158 /arch/m68k/platform/coldfire/pit.c
parentMerge branch 'next' of git://git.infradead.org/users/vkoul/slave-dma (diff)
parentm68k: allow PCI bus to be enabled for ColdFire m54xx CPUs (diff)
downloadlinux-2c05b2c838e7adaabb7265ad5d5b632315c20821.tar.xz
linux-2c05b2c838e7adaabb7265ad5d5b632315c20821.zip
Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu
Pull m68knommu arch update from Greg Ungerer: "Quite a varied set of changes this time. - A little more merge cleanup, this time the assembler entry code. - New sub-architecture support for the ColdFire 5251/5253 and 5441x CPU families. - Specific clk support code for the ColdFire 520x and 532x CPU familes. - Refactoring of the ColdFire GPIO support. - PCI bus support for some ColdFire CPUS that have PCI hardware (54xx family). This showed up a few problems with ColdFire cache, allocating coherent memory and bi-directional DMA support. Fixes for those too." * 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (21 commits) m68k: allow PCI bus to be enabled for ColdFire m54xx CPUs m68k: add PCI bus code support for the ColdFire M54xx SoC family m68k: add IO access definitions to support PCI on ColdFire platforms m68k: add PCI bus support definitions for the ColdFire M54xx SoC family m68k: common PCI support definitions and code m68k: add support for DMA_BIDIRECTIONAL in dma support functions m68k: fix ColdFire clear cache operation m68k: use simpler dma_alloc_coherent() for ColdFire CPUs m68knommu: platform support for 8390 based ethernet used on some boards m68knommu: Add clk definitions for m532x. m68knommu: Add clk definitions for m520x. m68knommu: Add rtc device for m5441x. m68knommu: add definitions for the third interrupt controller on devices that don't have a third interrupt controller. m68knommu: Add support for the Coldfire m5441x. m68knommu: use MCF_IRQ_PIT1 instead of MCFINT_VECBASE + MCFINT_PIT1 coldfire-qspi: Add support for the Coldfire 5251/5253. m68knommu: Add support for the Coldfire 5251/5253 m68knommu: refactor Coldfire GPIO not to require GPIOLIB, eliminate mcf_gpio_chips. m68k: merge the MMU and non-MMU versions of the entry.S code m68k: use jbsr to call functions instead of bsrl ...
Diffstat (limited to 'arch/m68k/platform/coldfire/pit.c')
-rw-r--r--arch/m68k/platform/coldfire/pit.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/m68k/platform/coldfire/pit.c b/arch/m68k/platform/coldfire/pit.c
index e62dbbcb10f6..e8f3b97b0f77 100644
--- a/arch/m68k/platform/coldfire/pit.c
+++ b/arch/m68k/platform/coldfire/pit.c
@@ -93,7 +93,7 @@ struct clock_event_device cf_pit_clockevent = {
.set_mode = init_cf_pit_timer,
.set_next_event = cf_pit_next_event,
.shift = 32,
- .irq = MCFINT_VECBASE + MCFINT_PIT1,
+ .irq = MCF_IRQ_PIT1,
};
@@ -159,7 +159,7 @@ void hw_timer_init(irq_handler_t handler)
clockevent_delta2ns(0x3f, &cf_pit_clockevent);
clockevents_register_device(&cf_pit_clockevent);
- setup_irq(MCFINT_VECBASE + MCFINT_PIT1, &pit_irq);
+ setup_irq(MCF_IRQ_PIT1, &pit_irq);
clocksource_register_hz(&pit_clk, FREQ);
}