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author | Thomas Gleixner <tglx@linutronix.de> | 2010-05-10 11:59:37 +0200 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2010-05-10 14:20:42 +0200 |
commit | dbb6be6d5e974c42bbecd183effaa0df69e1dd8b (patch) | |
tree | 5735cb47e70853d057a9881dd0ce44b83e88fa63 /arch/microblaze/include/asm/io.h | |
parent | time: Remove xtime_cache (diff) | |
parent | Linux 2.6.34-rc7 (diff) | |
download | linux-dbb6be6d5e974c42bbecd183effaa0df69e1dd8b.tar.xz linux-dbb6be6d5e974c42bbecd183effaa0df69e1dd8b.zip |
Merge branch 'linus' into timers/core
Reason: Further posix_cpu_timer patches depend on mainline changes
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/microblaze/include/asm/io.h')
-rw-r--r-- | arch/microblaze/include/asm/io.h | 38 |
1 files changed, 23 insertions, 15 deletions
diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/include/asm/io.h index 267c7c779e53..00b5398d08c7 100644 --- a/arch/microblaze/include/asm/io.h +++ b/arch/microblaze/include/asm/io.h @@ -15,7 +15,23 @@ #include <asm/page.h> #include <linux/types.h> #include <linux/mm.h> /* Get struct page {...} */ +#include <asm-generic/iomap.h> +#ifndef CONFIG_PCI +#define _IO_BASE 0 +#define _ISA_MEM_BASE 0 +#define PCI_DRAM_OFFSET 0 +#else +#define _IO_BASE isa_io_base +#define _ISA_MEM_BASE isa_mem_base +#define PCI_DRAM_OFFSET pci_dram_offset +#endif + +extern unsigned long isa_io_base; +extern unsigned long pci_io_base; +extern unsigned long pci_dram_offset; + +extern resource_size_t isa_mem_base; #define IO_SPACE_LIMIT (0xFFFFFFFF) @@ -92,6 +108,11 @@ static inline void writel(unsigned int v, volatile void __iomem *addr) #define iowrite16(v, addr) __raw_writew((u16)(v), (u16 *)(addr)) #define iowrite32(v, addr) __raw_writel((u32)(v), (u32 *)(addr)) +#define ioread16be(addr) __raw_readw((u16 *)(addr)) +#define ioread32be(addr) __raw_readl((u32 *)(addr)) +#define iowrite16be(v, addr) __raw_writew((u16)(v), (u16 *)(addr)) +#define iowrite32be(v, addr) __raw_writel((u32)(v), (u32 *)(addr)) + /* These are the definitions for the x86 IO instructions * inb/inw/inl/outb/outw/outl, the "string" versions * insb/insw/insl/outsb/outsw/outsl, and the "pausing" versions @@ -118,15 +139,10 @@ static inline void writel(unsigned int v, volatile void __iomem *addr) #ifdef CONFIG_MMU -#define mm_ptov(addr) ((void *)__phys_to_virt(addr)) -#define mm_vtop(addr) ((unsigned long)__virt_to_phys(addr)) #define phys_to_virt(addr) ((void *)__phys_to_virt(addr)) #define virt_to_phys(addr) ((unsigned long)__virt_to_phys(addr)) #define virt_to_bus(addr) ((unsigned long)__virt_to_phys(addr)) -#define __page_address(page) \ - (PAGE_OFFSET + (((page) - mem_map) << PAGE_SHIFT)) -#define page_to_phys(page) virt_to_phys((void *)__page_address(page)) #define page_to_bus(page) (page_to_phys(page)) #define bus_to_virt(addr) (phys_to_virt(addr)) @@ -227,15 +243,7 @@ static inline void __iomem *__ioremap(phys_addr_t address, unsigned long size, #define out_8(a, v) __raw_writeb((v), (a)) #define in_8(a) __raw_readb(a) -/* FIXME */ -static inline void __iomem *ioport_map(unsigned long port, unsigned int len) -{ - return (void __iomem *) (port); -} - -static inline void ioport_unmap(void __iomem *addr) -{ - /* Nothing to do */ -} +#define ioport_map(port, nr) ((void __iomem *)(port)) +#define ioport_unmap(addr) #endif /* _ASM_MICROBLAZE_IO_H */ |