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authorJoerg Roedel <joerg.roedel@amd.com>2010-06-01 09:57:49 +0200
committerJoerg Roedel <joerg.roedel@amd.com>2010-06-01 09:57:49 +0200
commit1d61e73ab4c7470833241af888939a7aab2b0354 (patch)
treedd714c2428070a7ea2bf807c2821ac75ff13ec55 /arch/microblaze/include/asm/system.h
parentarch/x86/kernel: Add missing spin_unlock (diff)
parentLinux 2.6.35-rc1 (diff)
downloadlinux-1d61e73ab4c7470833241af888939a7aab2b0354.tar.xz
linux-1d61e73ab4c7470833241af888939a7aab2b0354.zip
Merge commit 'v2.6.35-rc1' into amd-iommu/2.6.35
Diffstat (limited to 'arch/microblaze/include/asm/system.h')
-rw-r--r--arch/microblaze/include/asm/system.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/microblaze/include/asm/system.h b/arch/microblaze/include/asm/system.h
index 59efb3fef957..48c4f0335e3f 100644
--- a/arch/microblaze/include/asm/system.h
+++ b/arch/microblaze/include/asm/system.h
@@ -12,6 +12,7 @@
#include <asm/registers.h>
#include <asm/setup.h>
#include <asm/irqflags.h>
+#include <asm/cache.h>
#include <asm-generic/cmpxchg.h>
#include <asm-generic/cmpxchg-local.h>
@@ -96,4 +97,14 @@ extern struct dentry *of_debugfs_root;
#define arch_align_stack(x) (x)
+/*
+ * MicroBlaze doesn't handle unaligned accesses in hardware.
+ *
+ * Based on this we force the IP header alignment in network drivers.
+ * We also modify NET_SKB_PAD to be a cacheline in size, thus maintaining
+ * cacheline alignment of buffers.
+ */
+#define NET_IP_ALIGN 2
+#define NET_SKB_PAD L1_CACHE_BYTES
+
#endif /* _ASM_MICROBLAZE_SYSTEM_H */