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authorRavi Bangoria <ravi.bangoria@linux.ibm.com>2020-11-06 05:56:50 +0100
committerMichael Ellerman <mpe@ellerman.id.au>2020-12-10 14:09:10 +0100
commit3d2ffcdd2a982e8bbe65fa0f94fb21bf304c281e (patch)
tree865ba5d13b0440a09d2cd3e85fd588c897ed5769 /arch/mips/Kbuild
parentpowerpc/sstep: Add testcases for VSX vector paired load/store instructions (diff)
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powerpc/watchpoint: Workaround P10 DD1 issue with VSX-32 byte instructions
POWER10 DD1 has an issue where it generates watchpoint exceptions when it shouldn't. The conditions where this occur are: - octword op - ending address of DAWR range is less than starting address of op - those addresses need to be in the same or in two consecutive 512B blocks - 'op address + 64B' generates an address that has a carry into bit 52 (crosses 2K boundary) Handle such spurious exception by considering them as extraneous and emulating/single-steeping instruction without generating an event. [ravi: Fixed build warning reported by lkp@intel.com] Signed-off-by: Ravi Bangoria <ravi.bangoria@linux.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20201106045650.278987-1-ravi.bangoria@linux.ibm.com
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