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authorJayachandran C <jchandra@broadcom.com>2013-12-21 12:22:13 +0100
committerRalf Baechle <ralf@linux-mips.org>2014-01-24 22:39:46 +0100
commitc24a8a7a99885d5b986f38f6631f69e7794a3e5e (patch)
treea0d6702fc1c45cba157a5734215c509fa4b216c6 /arch/mips/Kconfig
parentMIPS: malta: Incorporate PIIX4 ACPI I/O region in PCI controller resources (diff)
downloadlinux-c24a8a7a99885d5b986f38f6631f69e7794a3e5e.tar.xz
linux-c24a8a7a99885d5b986f38f6631f69e7794a3e5e.zip
MIPS: Netlogic: Add MSI support for XLP
Add MSI chip and MSIX chip definitions. For MSI, we map the link interrupt to a MSI link IRQ which will do a second level of dispatch based on the MSI status register. The MSI chip definitions use the MSI enable register to enable and disable the MSI irqs. For MSI-X, we split the 32 available MSI-X vectors across the four PCIe links (8 each). These PIC interrupts generate an IRQ per link which uses a second level dispatch as well. The MSI-X chip definition uses the standard functions to enable and disable interrupts. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6270/
Diffstat (limited to 'arch/mips/Kconfig')
-rw-r--r--arch/mips/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index b79b5388857f..3d9f9a8b62bd 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -775,6 +775,7 @@ config NLM_XLP_BOARD
select CEVT_R4K
select CSRC_R4K
select IRQ_CPU
+ select ARCH_SUPPORTS_MSI
select ZONE_DMA32 if 64BIT
select SYNC_R4K
select SYS_HAS_EARLY_PRINTK