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authorDavid Daney <david.daney@cavium.com>2013-05-22 17:10:46 +0200
committerRalf Baechle <ralf@linux-mips.org>2013-06-10 18:01:25 +0200
commit9ddebc46e70b434e485060f7c1b53c5b848a6c8c (patch)
tree3a0c3c6d29b223390cccac888a4411a4fa217ab1 /arch/mips/Kconfig
parentMIPS: PowerTV: use free_reserved_area() to simplify code (diff)
downloadlinux-9ddebc46e70b434e485060f7c1b53c5b848a6c8c.tar.xz
linux-9ddebc46e70b434e485060f7c1b53c5b848a6c8c.zip
MIPS: OCTEON: Rename Kconfig CAVIUM_OCTEON_REFERENCE_BOARD to CAVIUM_OCTEON_SOC
CAVIUM_OCTEON_SOC most place we used to use CPU_CAVIUM_OCTEON. This allows us to CPU_CAVIUM_OCTEON in places where we have no OCTEON SOC. Remove CAVIUM_OCTEON_SIMULATOR as it doesn't really do anything, we can get the same configuration with CAVIUM_OCTEON_SOC. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-ide@vger.kernel.org Cc: linux-edac@vger.kernel.org Cc: linux-i2c@vger.kernel.org Cc: netdev@vger.kernel.org Cc: spi-devel-general@lists.sourceforge.net Cc: devel@driverdev.osuosl.org Cc: linux-usb@vger.kernel.org Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Mauro Carvalho Chehab <mchehab@redhat.com> Patchwork: https://patchwork.linux-mips.org/patch/5295/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/Kconfig')
-rw-r--r--arch/mips/Kconfig19
1 files changed, 2 insertions, 17 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 7a58ab933b20..ade99730ef3b 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -735,23 +735,8 @@ config WR_PPMC
This enables support for the Wind River MIPS32 4KC PPMC evaluation
board, which is based on GT64120 bridge chip.
-config CAVIUM_OCTEON_SIMULATOR
- bool "Cavium Networks Octeon Simulator"
- select CEVT_R4K
- select 64BIT_PHYS_ADDR
- select DMA_COHERENT
- select SYS_SUPPORTS_64BIT_KERNEL
- select SYS_SUPPORTS_BIG_ENDIAN
- select SYS_SUPPORTS_HOTPLUG_CPU
- select SYS_HAS_CPU_CAVIUM_OCTEON
- select HOLES_IN_ZONE
- help
- The Octeon simulator is software performance model of the Cavium
- Octeon Processor. It supports simulating Octeon processors on x86
- hardware.
-
-config CAVIUM_OCTEON_REFERENCE_BOARD
- bool "Cavium Networks Octeon reference board"
+config CAVIUM_OCTEON_SOC
+ bool "Cavium Networks Octeon SoC based boards"
select CEVT_R4K
select 64BIT_PHYS_ADDR
select DMA_COHERENT