diff options
| author | Paul Burton <paul.burton@imgtec.com> | 2014-05-07 13:20:57 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-05-30 21:01:09 +0200 |
| commit | b6911bba598f5d611f7fdbb87b5af7f1712dbe9d (patch) | |
| tree | 8d19951428748909cd508251ebce1d1a5e2cf6ec /arch/mips/Kconfig | |
| parent | MIPS: Define some more PIIX4 registers & values (diff) | |
| download | linux-b6911bba598f5d611f7fdbb87b5af7f1712dbe9d.tar.xz linux-b6911bba598f5d611f7fdbb87b5af7f1712dbe9d.zip | |
MIPS: Malta: add suspend state entry code
This patch introduces code which will enter a suspend state via the
PIIX4. This can only be done when PCI support is enabled since it
requires access to PCI I/O space and the generation of a special cycle
on the PCI bus. In cases where PCI is disabled the mips_pm_suspend
function will simply always return an error.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6905/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/Kconfig')
| -rw-r--r-- | arch/mips/Kconfig | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 4e49591f79cb..2f2020f56898 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1671,6 +1671,12 @@ config SYS_HAS_CPU_XLR config SYS_HAS_CPU_XLP bool +config MIPS_MALTA_PM + depends on MIPS_MALTA + depends on PCI + bool + default y + # # CPU may reorder R->R, R->W, W->R, W->W # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC |