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| author | pascal@pabr.org <pascal@pabr.org> | 2010-01-03 13:39:12 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2010-02-27 12:53:17 +0100 |
| commit | 60ec6571c5072cdea9e518d1dac8147b85ca93a2 (patch) | |
| tree | 7543987848f6c00467bb5adea4ccfe096faf8835 /arch/mips/Kconfig | |
| parent | MIPS: Loongson: Cleanup the halt and poweroff action (diff) | |
| download | linux-60ec6571c5072cdea9e518d1dac8147b85ca93a2.tar.xz linux-60ec6571c5072cdea9e518d1dac8147b85ca93a2.zip | |
MIPS: Support 36-bit iomem on 32-bit Au1x00
I believe these changes are needed on Alchemy SoCs in order to
use iomem above 4G with the usual platform_device machinery:
- Set CONFIG_ARCH_PHYS_ADDR_T_64BIT to make resource_size_t 64-bit.
- Increase IOMEM_RESOURCE_END so that platforms can register resources.
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/814/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/Kconfig')
| -rw-r--r-- | arch/mips/Kconfig | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index db0a85355be7..591ca0cd4c24 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1725,6 +1725,9 @@ config SB1_PASS_2_1_WORKAROUNDS config 64BIT_PHYS_ADDR bool +config ARCH_PHYS_ADDR_T_64BIT + def_bool 64BIT_PHYS_ADDR + config CPU_HAS_SMARTMIPS depends on SYS_SUPPORTS_SMARTMIPS bool "Support for the SmartMIPS ASE" |