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authorManuel Lauss <manuel.lauss@googlemail.com>2009-11-23 20:40:01 +0100
committerRalf Baechle <ralf@linux-mips.org>2010-02-27 12:53:02 +0100
commit5d400f5c59df3ed2c3682a7409c8e81a7c4e650c (patch)
treec501fe5a419532d10cc39dae3f1ce044716e25b4 /arch/mips/alchemy/Kconfig
parentMIPS: Alchemy: use runtime cpu detection in GPIO code. (diff)
downloadlinux-5d400f5c59df3ed2c3682a7409c8e81a7c4e650c.tar.xz
linux-5d400f5c59df3ed2c3682a7409c8e81a7c4e650c.zip
MIPS: Alchemy: Only build AU1000 INTC code for compatible cpus
Use the GPIO config symbol to only build Au1000 interrupt code on chips with compatible hw. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/670/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/alchemy/Kconfig')
-rw-r--r--arch/mips/alchemy/Kconfig14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/mips/alchemy/Kconfig b/arch/mips/alchemy/Kconfig
index 22f4ff5103c1..df3b1a7eb15d 100644
--- a/arch/mips/alchemy/Kconfig
+++ b/arch/mips/alchemy/Kconfig
@@ -1,5 +1,5 @@
-# au1000-style gpio
-config ALCHEMY_GPIO_AU1000
+# au1000-style gpio and interrupt controllers
+config ALCHEMY_GPIOINT_AU1000
bool
# select this in your board config if you don't want to use the gpio
@@ -133,27 +133,27 @@ endchoice
config SOC_AU1000
bool
select SOC_AU1X00
- select ALCHEMY_GPIO_AU1000
+ select ALCHEMY_GPIOINT_AU1000
config SOC_AU1100
bool
select SOC_AU1X00
- select ALCHEMY_GPIO_AU1000
+ select ALCHEMY_GPIOINT_AU1000
config SOC_AU1500
bool
select SOC_AU1X00
- select ALCHEMY_GPIO_AU1000
+ select ALCHEMY_GPIOINT_AU1000
config SOC_AU1550
bool
select SOC_AU1X00
- select ALCHEMY_GPIO_AU1000
+ select ALCHEMY_GPIOINT_AU1000
config SOC_AU1200
bool
select SOC_AU1X00
- select ALCHEMY_GPIO_AU1000
+ select ALCHEMY_GPIOINT_AU1000
config SOC_AU1X00
bool