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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-14 22:05:21 +0100 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-14 22:05:21 +0100 |
| commit | 4964e0664c80680fa6b28ef91381c076a5b25c2c (patch) | |
| tree | 62099c5aaeee7274bcc66bcfba35d479affa97cf /arch/mips/alchemy/devboards/bcsr.c | |
| parent | Merge tag 'for-linus' of git://github.com/rustyrussell/linux (diff) | |
| parent | Merge branches 'next/ar7', 'next/ath79', 'next/bcm63xx', 'next/bmips', 'next/... (diff) | |
| download | linux-4964e0664c80680fa6b28ef91381c076a5b25c2c.tar.xz linux-4964e0664c80680fa6b28ef91381c076a5b25c2c.zip | |
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (119 commits)
MIPS: Delete unused function add_temporary_entry.
MIPS: Set default pci cache line size.
MIPS: Flush huge TLB
MIPS: Octeon: Remove SYS_SUPPORTS_HIGHMEM.
MIPS: Octeon: Add support for OCTEON II PCIe
MIPS: Octeon: Update PCI Latency timer and enable more error reporting.
MIPS: Alchemy: Update cpu-feature-overrides
MIPS: Alchemy: db1200: Improve PB1200 detection.
MIPS: Alchemy: merge Au1000 and Au1300-style IRQ controller code.
MIPS: Alchemy: chain IRQ controllers to MIPS IRQ controller
MIPS: Alchemy: irq: register pm at irq init time
MIPS: Alchemy: Touchscreen support on DB1100
MIPS: Alchemy: Hook up IrDA on DB1000/DB1100
net/irda: convert au1k_ir to platform driver.
MIPS: Alchemy: remove unused board headers
MTD: nand: make au1550nd.c a platform_driver
MIPS: Netlogic: Mark Netlogic chips as SMT capable
MIPS: Netlogic: Add support for XLP 3XX cores
MIPS: Netlogic: Merge some of XLR/XLP wakup code
MIPS: Netlogic: Add default XLP config.
...
Fix up trivial conflicts in arch/mips/kernel/{perf_event_mipsxx.c,
traps.c} and drivers/tty/serial/Makefile
Diffstat (limited to 'arch/mips/alchemy/devboards/bcsr.c')
| -rw-r--r-- | arch/mips/alchemy/devboards/bcsr.c | 11 |
1 files changed, 2 insertions, 9 deletions
diff --git a/arch/mips/alchemy/devboards/bcsr.c b/arch/mips/alchemy/devboards/bcsr.c index 463d2c4d9441..1e83ce2e1147 100644 --- a/arch/mips/alchemy/devboards/bcsr.c +++ b/arch/mips/alchemy/devboards/bcsr.c @@ -97,14 +97,9 @@ static void bcsr_csc_handler(unsigned int irq, struct irq_desc *d) enable_irq(irq); } -/* NOTE: both the enable and mask bits must be cleared, otherwise the - * CPLD generates tons of spurious interrupts (at least on my DB1200). - * -- mlau - */ static void bcsr_irq_mask(struct irq_data *d) { unsigned short v = 1 << (d->irq - bcsr_csc_base); - __raw_writew(v, bcsr_virt + BCSR_REG_INTCLR); __raw_writew(v, bcsr_virt + BCSR_REG_MASKCLR); wmb(); } @@ -112,7 +107,6 @@ static void bcsr_irq_mask(struct irq_data *d) static void bcsr_irq_maskack(struct irq_data *d) { unsigned short v = 1 << (d->irq - bcsr_csc_base); - __raw_writew(v, bcsr_virt + BCSR_REG_INTCLR); __raw_writew(v, bcsr_virt + BCSR_REG_MASKCLR); __raw_writew(v, bcsr_virt + BCSR_REG_INTSTAT); /* ack */ wmb(); @@ -121,7 +115,6 @@ static void bcsr_irq_maskack(struct irq_data *d) static void bcsr_irq_unmask(struct irq_data *d) { unsigned short v = 1 << (d->irq - bcsr_csc_base); - __raw_writew(v, bcsr_virt + BCSR_REG_INTSET); __raw_writew(v, bcsr_virt + BCSR_REG_MASKSET); wmb(); } @@ -137,9 +130,9 @@ void __init bcsr_init_irq(int csc_start, int csc_end, int hook_irq) { unsigned int irq; - /* mask & disable & ack all */ - __raw_writew(0xffff, bcsr_virt + BCSR_REG_INTCLR); + /* mask & enable & ack all */ __raw_writew(0xffff, bcsr_virt + BCSR_REG_MASKCLR); + __raw_writew(0xffff, bcsr_virt + BCSR_REG_INTSET); __raw_writew(0xffff, bcsr_virt + BCSR_REG_INTSTAT); wmb(); |