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author | Sergey Ryazanov <ryazanov.s.a@gmail.com> | 2014-10-29 00:18:44 +0100 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2014-11-24 07:45:27 +0100 |
commit | a7473717483ef3bb78563611bf1b3b82c5515b2e (patch) | |
tree | d5e3431409c4aee784c7c8401cf19614aed91d7c /arch/mips/ath25/ar5312.c | |
parent | MIPS: ath25: add UART support (diff) | |
download | linux-a7473717483ef3bb78563611bf1b3b82c5515b2e.tar.xz linux-a7473717483ef3bb78563611bf1b3b82c5515b2e.zip |
MIPS: ath25: add board configuration detection
All boards based on AR5312/AR2315 SoC have a special structure located
at the end of flash. This structure contains board-specific data such as
Ethernet and Wireless MAC addresses. The flash is mapped to the memmory
at predefined location.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Cc: Linux MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/8243/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/ath25/ar5312.c')
-rw-r--r-- | arch/mips/ath25/ar5312.c | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/arch/mips/ath25/ar5312.c b/arch/mips/ath25/ar5312.c index 398d4fd4dd2d..41bd56d6ab23 100644 --- a/arch/mips/ath25/ar5312.c +++ b/arch/mips/ath25/ar5312.c @@ -158,6 +158,45 @@ void __init ar5312_arch_init_irq(void) ar5312_misc_irq_domain = domain; } +static void __init ar5312_flash_init(void) +{ + void __iomem *flashctl_base; + u32 ctl; + + flashctl_base = ioremap_nocache(AR5312_FLASHCTL_BASE, + AR5312_FLASHCTL_SIZE); + + /* + * Configure flash bank 0. + * Assume 8M window size. Flash will be aliased if it's smaller + */ + ctl = __raw_readl(flashctl_base + AR5312_FLASHCTL0); + ctl &= AR5312_FLASHCTL_MW; + ctl |= AR5312_FLASHCTL_E | AR5312_FLASHCTL_AC_8M | AR5312_FLASHCTL_RBLE; + ctl |= 0x01 << AR5312_FLASHCTL_IDCY_S; + ctl |= 0x07 << AR5312_FLASHCTL_WST1_S; + ctl |= 0x07 << AR5312_FLASHCTL_WST2_S; + __raw_writel(ctl, flashctl_base + AR5312_FLASHCTL0); + + /* Disable other flash banks */ + ctl = __raw_readl(flashctl_base + AR5312_FLASHCTL1); + ctl &= ~(AR5312_FLASHCTL_E | AR5312_FLASHCTL_AC); + __raw_writel(ctl, flashctl_base + AR5312_FLASHCTL1); + ctl = __raw_readl(flashctl_base + AR5312_FLASHCTL2); + ctl &= ~(AR5312_FLASHCTL_E | AR5312_FLASHCTL_AC); + __raw_writel(ctl, flashctl_base + AR5312_FLASHCTL2); + + iounmap(flashctl_base); +} + +void __init ar5312_init_devices(void) +{ + ar5312_flash_init(); + + /* Locate board/radio config data */ + ath25_find_config(AR5312_FLASH_BASE, AR5312_FLASH_SIZE); +} + static void ar5312_restart(char *command) { /* reset the system */ |