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author | Ralf Baechle <ralf@linux-mips.org> | 2007-10-12 00:46:09 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-12 00:46:09 +0200 |
commit | 7bcf7717b6a047c272410d0cd00213185fe6b99d (patch) | |
tree | 81c5d6bbc2130815713e22bb5408ea80b6e1c499 /arch/mips/au1000/common | |
parent | [MIPS] Consolidate all variants of MIPS cp0 timer interrupt handlers. (diff) | |
download | linux-7bcf7717b6a047c272410d0cd00213185fe6b99d.tar.xz linux-7bcf7717b6a047c272410d0cd00213185fe6b99d.zip |
[MIPS] Implement clockevents for R4000-style cp0 count/compare interrupt
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/au1000/common')
-rw-r--r-- | arch/mips/au1000/common/irq.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/au1000/common/irq.c b/arch/mips/au1000/common/irq.c index 47949d6f2c10..a6640b998c6e 100644 --- a/arch/mips/au1000/common/irq.c +++ b/arch/mips/au1000/common/irq.c @@ -633,7 +633,7 @@ asmlinkage void plat_irq_dispatch(void) unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM; if (pending & CAUSEF_IP7) - ll_timer_interrupt(63); + do_IRQ(63); else if (pending & CAUSEF_IP2) intc0_req0_irqdispatch(); else if (pending & CAUSEF_IP3) |