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authorRalf Baechle <ralf@linux-mips.org>2007-10-17 00:20:48 +0200
committerRalf Baechle <ralf@linux-mips.org>2007-10-17 19:28:47 +0200
commitb0d4056dd6f16eca63114d0c252b214449a13cca (patch)
tree50c55bdd330574fcdb718e4192d02b91f2aaa551 /arch/mips/au1000/common
parent[MIPS] SYNC emulation for MIPS I processors (diff)
downloadlinux-b0d4056dd6f16eca63114d0c252b214449a13cca.tar.xz
linux-b0d4056dd6f16eca63114d0c252b214449a13cca.zip
[MIPS] Probe for usability of cp0 compare interrupt.
Some processors offer the option of using the interrupt on which normally the count / compare interrupt would be signaled as a normal interupt pin. Previously this required some ugly hackery for each system which is much easier done by a quick and simple probe. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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