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authorHauke Mehrtens <hauke@hauke-m.de>2011-07-23 01:20:12 +0200
committerJohn W. Linville <linville@tuxdriver.com>2011-08-08 20:29:30 +0200
commit08ccf57283f89adbc2ff897ad82d6ad4560db7cd (patch)
tree11d715ac33eab75e57a8e62b0b7d822e316a9145 /arch/mips/bcm47xx/nvram.c
parentbcma: get CPU clock (diff)
downloadlinux-08ccf57283f89adbc2ff897ad82d6ad4560db7cd.tar.xz
linux-08ccf57283f89adbc2ff897ad82d6ad4560db7cd.zip
bcm47xx: prepare to support different buses
Prepare bcm47xx to support different System buses. Before adding support for bcma it should be possible to build bcm47xx without the need of ssb. With this patch bcm47xx does not directly contain a ssb_bus, but a union contain all the supported system buses. As a SoC just uses one system bus a union is a good choice. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'arch/mips/bcm47xx/nvram.c')
-rw-r--r--arch/mips/bcm47xx/nvram.c15
1 files changed, 11 insertions, 4 deletions
diff --git a/arch/mips/bcm47xx/nvram.c b/arch/mips/bcm47xx/nvram.c
index 54db815bc86c..bcac2ffd1248 100644
--- a/arch/mips/bcm47xx/nvram.c
+++ b/arch/mips/bcm47xx/nvram.c
@@ -26,14 +26,21 @@ static char nvram_buf[NVRAM_SPACE];
/* Probe for NVRAM header */
static void early_nvram_init(void)
{
- struct ssb_mipscore *mcore = &ssb_bcm47xx.mipscore;
+ struct ssb_mipscore *mcore_ssb;
struct nvram_header *header;
int i;
- u32 base, lim, off;
+ u32 base = 0;
+ u32 lim = 0;
+ u32 off;
u32 *src, *dst;
- base = mcore->flash_window;
- lim = mcore->flash_window_size;
+ switch (bcm47xx_bus_type) {
+ case BCM47XX_BUS_TYPE_SSB:
+ mcore_ssb = &bcm47xx_bus.ssb.mipscore;
+ base = mcore_ssb->flash_window;
+ lim = mcore_ssb->flash_window_size;
+ break;
+ }
off = FLASH_MIN;
while (off <= lim) {