diff options
| author | Aurelien Jarno <aurelien@aurel32.net> | 2007-09-25 15:42:09 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-12 00:46:07 +0200 |
| commit | 34cc662f8aae0ce1db5c64d55a39a5081f9e3cd8 (patch) | |
| tree | 69447356fb052c8aa3a74154f2dee082b64f275d /arch/mips/bcm47xx | |
| parent | [MIPS] Add CFE support to BCM47XX (diff) | |
| download | linux-34cc662f8aae0ce1db5c64d55a39a5081f9e3cd8.tar.xz linux-34cc662f8aae0ce1db5c64d55a39a5081f9e3cd8.zip | |
[MIPS] Add gpio support to the BCM47XX platform
Add GPIO support to the BCM47XX platform. It will be used by a GPIO
LED driver.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/bcm47xx')
| -rw-r--r-- | arch/mips/bcm47xx/Makefile | 2 | ||||
| -rw-r--r-- | arch/mips/bcm47xx/gpio.c | 79 |
2 files changed, 80 insertions, 1 deletions
diff --git a/arch/mips/bcm47xx/Makefile b/arch/mips/bcm47xx/Makefile index dc035f90d363..0afe09703e3f 100644 --- a/arch/mips/bcm47xx/Makefile +++ b/arch/mips/bcm47xx/Makefile @@ -3,4 +3,4 @@ # under Linux. # -obj-y := irq.o prom.o serial.o setup.o time.o +obj-y := gpio.o irq.o prom.o serial.o setup.o time.o diff --git a/arch/mips/bcm47xx/gpio.c b/arch/mips/bcm47xx/gpio.c new file mode 100644 index 000000000000..f5a53acf995a --- /dev/null +++ b/arch/mips/bcm47xx/gpio.c @@ -0,0 +1,79 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2007 Aurelien Jarno <aurelien@aurel32.net> + */ + +#include <linux/ssb/ssb.h> +#include <linux/ssb/ssb_driver_chipcommon.h> +#include <linux/ssb/ssb_driver_extif.h> +#include <asm/mach-bcm47xx/bcm47xx.h> +#include <asm/mach-bcm47xx/gpio.h> + +int bcm47xx_gpio_to_irq(unsigned gpio) +{ + if (ssb_bcm47xx.chipco.dev) + return ssb_mips_irq(ssb_bcm47xx.chipco.dev) + 2; + else if (ssb_bcm47xx.extif.dev) + return ssb_mips_irq(ssb_bcm47xx.extif.dev) + 2; + else + return -EINVAL; +} +EXPORT_SYMBOL_GPL(bcm47xx_gpio_to_irq); + +int bcm47xx_gpio_get_value(unsigned gpio) +{ + if (ssb_bcm47xx.chipco.dev) + return ssb_chipco_gpio_in(&ssb_bcm47xx.chipco, 1 << gpio); + else if (ssb_bcm47xx.extif.dev) + return ssb_extif_gpio_in(&ssb_bcm47xx.extif, 1 << gpio); + else + return 0; +} +EXPORT_SYMBOL_GPL(bcm47xx_gpio_get_value); + +void bcm47xx_gpio_set_value(unsigned gpio, int value) +{ + if (ssb_bcm47xx.chipco.dev) + ssb_chipco_gpio_out(&ssb_bcm47xx.chipco, + 1 << gpio, + value ? 1 << gpio : 0); + else if (ssb_bcm47xx.extif.dev) + ssb_extif_gpio_out(&ssb_bcm47xx.extif, + 1 << gpio, + value ? 1 << gpio : 0); +} +EXPORT_SYMBOL_GPL(bcm47xx_gpio_set_value); + +int bcm47xx_gpio_direction_input(unsigned gpio) +{ + if (ssb_bcm47xx.chipco.dev && (gpio < BCM47XX_CHIPCO_GPIO_LINES)) + ssb_chipco_gpio_outen(&ssb_bcm47xx.chipco, + 1 << gpio, 0); + else if (ssb_bcm47xx.extif.dev && (gpio < BCM47XX_EXTIF_GPIO_LINES)) + ssb_extif_gpio_outen(&ssb_bcm47xx.extif, + 1 << gpio, 0); + else + return -EINVAL; + return 0; +} +EXPORT_SYMBOL_GPL(bcm47xx_gpio_direction_input); + +int bcm47xx_gpio_direction_output(unsigned gpio, int value) +{ + bcm47xx_gpio_set_value(gpio, value); + + if (ssb_bcm47xx.chipco.dev && (gpio < BCM47XX_CHIPCO_GPIO_LINES)) + ssb_chipco_gpio_outen(&ssb_bcm47xx.chipco, + 1 << gpio, 1 << gpio); + else if (ssb_bcm47xx.extif.dev && (gpio < BCM47XX_EXTIF_GPIO_LINES)) + ssb_extif_gpio_outen(&ssb_bcm47xx.extif, + 1 << gpio, 1 << gpio); + else + return -EINVAL; + return 0; +} +EXPORT_SYMBOL_GPL(bcm47xx_gpio_direction_output); + |