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author谢致邦 (XIE Zhibang) <Yeking@Red54.com>2017-01-04 14:30:58 +0100
committerPaul Burton <paul.burton@mips.com>2018-07-31 03:59:01 +0200
commit60bc84e227d24fdb1ac2211c574a88ecd7c836a0 (patch)
tree22a4bace0305a2901f87130100cbe923ee484b37 /arch/mips/boot
parentMIPS: Loongson: Set Loongson32 to MIPS32R1 (diff)
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MIPS: Loongson: Merge load addresses
Systems based upon the Loongson 1B & 1C CPUs share the same load address, as do those based upon Loongson 1A. Unify the definition of this load address to reduce duplication & avoid the need for an extra Loongson 1A case in future. [paul.burton@mips.com: Rewrite commit message.] Signed-off-by: 谢致邦 (XIE Zhibang) <Yeking@Red54.com> Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/14927/ Cc: linux-mips@linux-mips.org
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