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authorAlexandre Belloni <alexandre.belloni@bootlin.com>2018-07-31 16:38:55 +0200
committerPaul Burton <paul.burton@mips.com>2018-07-31 19:34:34 +0200
commit84a7f564fa14bf4713240f614c0b9a18730418fa (patch)
treedfbe7530dae55cb39b24137f96b34682db25674e /arch/mips/boot
parentmips: dts: mscc: Add spi on Ocelot (diff)
downloadlinux-84a7f564fa14bf4713240f614c0b9a18730418fa.tar.xz
linux-84a7f564fa14bf4713240f614c0b9a18730418fa.zip
mips: dts: mscc: enable spi and NOR flash support on ocelot PCB123
Ocelot PCB123 has a SPI NOR connected on its SPI bus. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Paul Burton <paul.burton@mips.com> Patchwork: https://patchwork.linux-mips.org/patch/20103/ Cc: Mark Brown <broonie@kernel.org> Cc: James Hogan <jhogan@kernel.org> Cc: linux-spi@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Cc: Allan Nielsen <allan.nielsen@microsemi.com>
Diffstat (limited to 'arch/mips/boot')
-rw-r--r--arch/mips/boot/dts/mscc/ocelot_pcb123.dts10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/mscc/ocelot_pcb123.dts b/arch/mips/boot/dts/mscc/ocelot_pcb123.dts
index 4ccd65379059..2266027759f9 100644
--- a/arch/mips/boot/dts/mscc/ocelot_pcb123.dts
+++ b/arch/mips/boot/dts/mscc/ocelot_pcb123.dts
@@ -26,6 +26,16 @@
status = "okay";
};
+&spi {
+ status = "okay";
+
+ flash@0 {
+ compatible = "macronix,mx25l25635f", "jedec,spi-nor";
+ spi-max-frequency = <20000000>;
+ reg = <0>;
+ };
+};
+
&mdio0 {
status = "okay";
};