diff options
author | Paul Burton <paul.burton@imgtec.com> | 2015-05-24 17:11:21 +0200 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2015-06-21 21:52:58 +0200 |
commit | adbdce77ccc345e6ae86f6887212af13983a626e (patch) | |
tree | b4fbb78c1e1dfd8683a9b57451dd087caac9044b /arch/mips/boot | |
parent | devicetree: document Ingenic SoC interrupt controller binding (diff) | |
download | linux-adbdce77ccc345e6ae86f6887212af13983a626e.tar.xz linux-adbdce77ccc345e6ae86f6887212af13983a626e.zip |
MIPS: JZ4740: probe interrupt controller via DT
Declare the JZ4740 interrupt controller for probe via DT using the
standard irqchip_init function, and make use of that function to probe
the controller by adding the appropriate node to the JZ4740 dtsi.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: devicetree@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: Brian Norris <computersforpeace@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/10135/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/boot')
-rw-r--r-- | arch/mips/boot/dts/ingenic/jz4740.dtsi | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/ingenic/jz4740.dtsi b/arch/mips/boot/dts/ingenic/jz4740.dtsi index dd3642fb924d..ba0e7e965b97 100644 --- a/arch/mips/boot/dts/ingenic/jz4740.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4740.dtsi @@ -9,4 +9,15 @@ interrupt-controller; compatible = "mti,cpu-interrupt-controller"; }; + + intc: interrupt-controller@10001000 { + compatible = "ingenic,jz4740-intc"; + reg = <0x10001000 0x14>; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&cpuintc>; + interrupts = <2>; + }; }; |