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author | Steven J. Hill <steven.hill@cavium.com> | 2018-06-05 07:24:51 +0200 |
---|---|---|
committer | Paul Burton <paul.burton@mips.com> | 2018-07-25 02:39:03 +0200 |
commit | 840267e4466c72d48ca951a9678f48a322fade35 (patch) | |
tree | f48c15692e6baeddb8b5187c0d34ea878c3a03df /arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c | |
parent | MIPS: memset.S: Add comments to fault fixup handlers (diff) | |
download | linux-840267e4466c72d48ca951a9678f48a322fade35.tar.xz linux-840267e4466c72d48ca951a9678f48a322fade35.zip |
MIPS: Octeon: Remove extern declarations.
Get rid of extern declarations in .c functions and included
the necessary header file. Also remove unused UART declares.
Signed-off-by: Steven J. Hill <steven.hill@cavium.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/19477/
Cc: linux-mips@linux-mips.org
Diffstat (limited to 'arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c')
-rw-r--r-- | arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c b/arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c index 578283350776..a176358c5a21 100644 --- a/arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c +++ b/arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c @@ -4,7 +4,7 @@ * Contact: support@caviumnetworks.com * This file is part of the OCTEON SDK * - * Copyright (c) 2003-2008 Cavium Networks + * Copyright (C) 2003-2018 Cavium, Inc. * * This file is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, Version 2, as @@ -39,10 +39,7 @@ #include <asm/octeon/cvmx-gmxx-defs.h> #include <asm/octeon/cvmx-pcsx-defs.h> - -void __cvmx_interrupt_gmxx_enable(int interface); -void __cvmx_interrupt_pcsx_intx_en_reg_enable(int index, int block); -void __cvmx_interrupt_pcsxx_int_en_reg_enable(int index); +#include <asm/octeon/cvmx-pcsxx-defs.h> /** * Perform initialization required only once for an SGMII port. |