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author | Mauro Carvalho Chehab <mchehab@redhat.com> | 2012-01-22 02:23:15 +0100 |
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committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2012-01-22 02:23:15 +0100 |
commit | 19c22c34dcbecb50c24548aa2ff2b07039c26c14 (patch) | |
tree | 15793721700c05310952fede97a2585ca1959709 /arch/mips/cavium-octeon/setup.c | |
parent | [media] az6007: CodingStyle fixes (diff) | |
parent | Linux 3.3-rc1 (diff) | |
download | linux-19c22c34dcbecb50c24548aa2ff2b07039c26c14.tar.xz linux-19c22c34dcbecb50c24548aa2ff2b07039c26c14.zip |
Merge tag 'v3.3-rc1' into staging/for_v3.3
* tag 'v3.3-rc1': (8187 commits)
Linux 3.3-rc1
x86, syscall: Need __ARCH_WANT_SYS_IPC for 32 bits
qnx4: don't leak ->BitMap on late failure exits
qnx4: reduce the insane nesting in qnx4_checkroot()
qnx4: di_fname is an array, for crying out loud...
KEYS: Permit key_serial() to be called with a const key pointer
keys: fix user_defined key sparse messages
ima: fix cred sparse warning
uml: fix compile for x86-64
MPILIB: Add a missing ENOMEM check
tpm: fix (ACPI S3) suspend regression
nvme: fix merge error due to change of 'make_request_fn' fn type
xen: using EXPORT_SYMBOL requires including export.h
gpio: tps65910: Use correct offset for gpio initialization
acpi/apei/einj: Add extensions to EINJ from rev 5.0 of acpi spec
intel_idle: Split up and provide per CPU initialization func
ACPI processor: Remove unneeded variable passed by acpi_processor_hotadd_init V2
tg3: Fix single-vector MSI-X code
openvswitch: Fix multipart datapath dumps.
ipv6: fix per device IP snmp counters
...
Diffstat (limited to 'arch/mips/cavium-octeon/setup.c')
-rw-r--r-- | arch/mips/cavium-octeon/setup.c | 14 |
1 files changed, 3 insertions, 11 deletions
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c index 2d9028f1474c..260b27367347 100644 --- a/arch/mips/cavium-octeon/setup.c +++ b/arch/mips/cavium-octeon/setup.c @@ -642,14 +642,6 @@ void __init plat_mem_setup(void) total = 0; - /* First add the init memory we will be returning. */ - memory = __pa_symbol(&__init_begin) & PAGE_MASK; - mem_alloc_size = (__pa_symbol(&__init_end) & PAGE_MASK) - memory; - if (mem_alloc_size > 0) { - add_memory_region(memory, mem_alloc_size, BOOT_MEM_RAM); - total += mem_alloc_size; - } - /* * The Mips memory init uses the first memory location for * some memory vectors. When SPARSEMEM is in use, it doesn't @@ -767,11 +759,11 @@ void prom_free_prom_memory(void) : "=r" (insn) : : "$31", "memory"); if ((insn >> 26) != 0x33) - panic("No PREF instruction at Core-14449 probe point.\n"); + panic("No PREF instruction at Core-14449 probe point."); if (((insn >> 16) & 0x1f) != 28) panic("Core-14449 WAR not in place (%04x).\n" - "Please build kernel with proper options (CONFIG_CAVIUM_CN63XXP1).\n", insn); + "Please build kernel with proper options (CONFIG_CAVIUM_CN63XXP1).", insn); } #ifdef CONFIG_CAVIUM_DECODE_RSL cvmx_interrupt_rsl_enable(); @@ -779,7 +771,7 @@ void prom_free_prom_memory(void) /* Add an interrupt handler for general failures. */ if (request_irq(OCTEON_IRQ_RML, octeon_rlm_interrupt, IRQF_SHARED, "RML/RSL", octeon_rlm_interrupt)) { - panic("Unable to request_irq(OCTEON_IRQ_RML)\n"); + panic("Unable to request_irq(OCTEON_IRQ_RML)"); } #endif } |