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authorRalf Baechle <ralf@linux-mips.org>2005-09-04 00:56:19 +0200
committerLinus Torvalds <torvalds@evo.osdl.org>2005-09-05 09:06:07 +0200
commit4ce588cd563e6b817adb0c7d03b3ed9c74cadc27 (patch)
treea20158d65f21e9fcf2ef9a7c50462905adfec248 /arch/mips/configs/capcella_defconfig
parent[PATCH] mips: nuke trailing whitespace (diff)
downloadlinux-4ce588cd563e6b817adb0c7d03b3ed9c74cadc27.tar.xz
linux-4ce588cd563e6b817adb0c7d03b3ed9c74cadc27.zip
[PATCH] mips: fix coherency configuration
Fix the MIPS coherency configuration such that we always keep the mapping state in <asm/pci.h> when we need to on non-coherent platforms. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/mips/configs/capcella_defconfig')
-rw-r--r--arch/mips/configs/capcella_defconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/configs/capcella_defconfig b/arch/mips/configs/capcella_defconfig
index 9abdcbc20a9e..158e7165f4e3 100644
--- a/arch/mips/configs/capcella_defconfig
+++ b/arch/mips/configs/capcella_defconfig
@@ -97,6 +97,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y
CONFIG_DMA_NONCOHERENT=y
+CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_IRQ_CPU=y
CONFIG_MIPS_L1_CACHE_SHIFT=5