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authorSergei Shtylyov <sshtylyov@ru.mvista.com>2008-03-27 14:09:31 +0100
committerRalf Baechle <ralf@linux-mips.org>2008-04-01 16:46:34 +0200
commit758e285faca4db948ecddefb523007255b29cdb7 (patch)
tree530fb34442234b04afe0972d6765bbc7f17ba0f6 /arch/mips/configs
parent[MIPS] Add missing 4KEC TLB refill handler (diff)
downloadlinux-758e285faca4db948ecddefb523007255b29cdb7.tar.xz
linux-758e285faca4db948ecddefb523007255b29cdb7.zip
[MIPS] Alchemy: work around clock misdetection on early Au1000
Work around the CPU clock miscalculation on Au1000DA/HA/HB due the sys_cpupll register being write-only, i.e. actually do what the comment before cal_r4off() function advertised for years but the code failed at. This is achieved by just giving user a chance to define the clock explicitly in the board config. via CONFIG_SOC_AU1000_FREQUENCY option, defaulting to 396 MHz if the option is not given... The patch is based on the AMD's big unpublished patch, the issue seems to be an undocumented errata (or feature :-)... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/configs')
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