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author | Maciej W. Rozycki <macro@linux-mips.org> | 2005-06-22 22:56:26 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2005-10-29 20:31:30 +0200 |
commit | 64dac503e8265007ea5c53b4d6bf42488a8a8d7a (patch) | |
tree | d086e5ddd6d36118b476ed0fe01091d9d4d70cec /arch/mips/dec/kn02-irq.c | |
parent | Use correct names for bits in the R3k cp0.status register. (diff) | |
download | linux-64dac503e8265007ea5c53b4d6bf42488a8a8d7a.tar.xz linux-64dac503e8265007ea5c53b4d6bf42488a8a8d7a.zip |
System-specific handling of bus errors for DECstation variations
supporting parity errors only for memory (Pmax/3min/Maxine).
Fixes for resources decoded by the KN04/KN05 MB ASIC. Additional
clean-ups for the ECC handler.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/dec/kn02-irq.c')
-rw-r--r-- | arch/mips/dec/kn02-irq.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/dec/kn02-irq.c b/arch/mips/dec/kn02-irq.c index e0bfcd1521e2..644085e10403 100644 --- a/arch/mips/dec/kn02-irq.c +++ b/arch/mips/dec/kn02-irq.c @@ -4,7 +4,7 @@ * DECstation 5000/200 (KN02) Control and Status Register * interrupts. * - * Copyright (c) 2002, 2003 Maciej W. Rozycki + * Copyright (c) 2002, 2003, 2005 Maciej W. Rozycki * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -111,7 +111,7 @@ void __init init_kn02_irqs(int base) /* Mask interrupts. */ spin_lock_irqsave(&kn02_lock, flags); - cached_kn02_csr &= ~KN03_CSR_IOINTEN; + cached_kn02_csr &= ~KN02_CSR_IOINTEN; *csr = cached_kn02_csr; iob(); spin_unlock_irqrestore(&kn02_lock, flags); |