summaryrefslogtreecommitdiffstats
path: root/arch/mips/fw
diff options
context:
space:
mode:
authorFlorian Fainelli <f.fainelli@gmail.com>2022-07-15 23:37:46 +0200
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2022-07-17 14:52:47 +0200
commitc059ee9d77f866dbe74bd75a42eb46443a31a08b (patch)
tree3a6a1899772a3e64680afa6e9f88f91a1c540b91 /arch/mips/fw
parentMIPS: Fixed __debug_virt_addr_valid() (diff)
downloadlinux-c059ee9d77f866dbe74bd75a42eb46443a31a08b.tar.xz
linux-c059ee9d77f866dbe74bd75a42eb46443a31a08b.zip
MIPS: CFE: Add cfe_die()
Add a cfe_die() implementation which is useful when the kernel does an early panic and no console is registered. This allows us to print useful diagnostics such as an invalid DTB having been configured/selected. Since the BMIPS_GENERIC kernel can be built with support for multiple processors, we need to do a runtime determination of the type of CPU that we are executing on to perform the appropriate XKS01 disabling. Since cfe_init() + cfe_die() could be conceivably called at very early stages of the kernel boot, before cpu_probe(), we do not rely on the structure(s) populated by cpu_probe(). Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/fw')
-rw-r--r--arch/mips/fw/cfe/cfe_api.c68
1 files changed, 67 insertions, 1 deletions
diff --git a/arch/mips/fw/cfe/cfe_api.c b/arch/mips/fw/cfe/cfe_api.c
index 0c9c97ab291e..dcdfd962dbde 100644
--- a/arch/mips/fw/cfe/cfe_api.c
+++ b/arch/mips/fw/cfe/cfe_api.c
@@ -13,10 +13,15 @@
*
* Authors: Mitch Lichtenberg, Chris Demetriou
*/
-
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/printk.h>
+#include <asm/mipsregs.h>
#include <asm/fw/cfe/cfe_api.h>
#include "cfe_api_int.h"
+unsigned long __initdata cfe_seal;
+
/* Cast from a native pointer to a cfe_xptr_t and back. */
#define XPTR_FROM_NATIVE(n) ((cfe_xptr_t) (intptr_t) (n))
#define NATIVE_FROM_XPTR(x) ((void *) (intptr_t) (x))
@@ -412,3 +417,64 @@ int cfe_writeblk(int handle, s64 offset, const char *buffer, int length)
return xiocb.xiocb_status;
return xiocb.plist.xiocb_buffer.buf_retlen;
}
+
+void __init cfe_die(char *fmt, ...)
+{
+ unsigned int prid, __maybe_unused rev;
+ char msg[128];
+ va_list ap;
+ int handle;
+ unsigned int count;
+
+ va_start(ap, fmt);
+ vsprintf(msg, fmt, ap);
+ strcat(msg, "\r\n");
+
+ if (cfe_seal != CFE_EPTSEAL)
+ goto no_cfe;
+
+ prid = read_c0_prid();
+ if ((prid & PRID_COMP_MASK) != PRID_COMP_BROADCOM)
+ goto no_cfe;
+
+ rev = prid & PRID_REV_MASK;
+
+ /* disable XKS01 so that CFE can access the registers */
+ switch (prid & PRID_IMP_MASK) {
+#ifdef CONFIG_CPU_BMIPS4380
+ case PRID_IMP_BMIPS43XX:
+ if (rev >= PRID_REV_BMIPS4380_LO &&
+ rev <= PRID_REV_BMIPS4380_HI)
+ __write_32bit_c0_register($22, 3,
+ __read_32bit_c0_register($22, 3) & ~BIT(12));
+ break;
+#endif
+#ifdef CONFIG_CPU_BMIPS5000
+ case PRID_IMP_BMIPS5000:
+ case PRID_IMP_BMIPS5200:
+ __write_32bit_c0_register($22, 5,
+ __read_32bit_c0_register($22, 5) & ~BIT(8));
+ break;
+#endif
+ default:
+ break;
+ }
+
+ handle = cfe_getstdhandle(CFE_STDHANDLE_CONSOLE);
+ if (handle < 0)
+ goto no_cfe;
+
+ cfe_write(handle, msg, strlen(msg));
+
+ for (count = 0; count < 0x7fffffff; count++)
+ mb();
+ cfe_exit(0, 1);
+ while (1)
+ ;
+
+no_cfe:
+ /* probably won't print anywhere useful */
+ panic("%s", msg);
+
+ va_end(ap);
+}