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author | Corey Minyard <cminyard@mvista.com> | 2017-08-10 20:27:38 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2017-09-06 11:01:26 +0200 |
commit | 9fef68686317bc9f85fb4e84e225d26ea2cb1cac (patch) | |
tree | ad055b32e70abcc551597a25076bc506969037f1 /arch/mips/include/asm/asm.h | |
parent | MIPS: Fix issues in backtraces (diff) | |
download | linux-9fef68686317bc9f85fb4e84e225d26ea2cb1cac.tar.xz linux-9fef68686317bc9f85fb4e84e225d26ea2cb1cac.zip |
MIPS: Make SAVE_SOME more standard
Modify the SAVE_SOME macro to look more like a standard
function, doing the arithmetic for the frame on the SP
register instead of copying it from K1, and by saving
the stored EPC from the RA. This lets the get_frame_info()
function process this function like any other. It also
remove an instruction or two from the kernel entry,
making it more efficient.
unwind_stack_by_address() has special handling for
the top of the interrupt stack, but without this change
unwinding will still fail if you get an interrupt while
handling an interrupt and try to do a traceback from
the second interrupt.
This change modifies the get_saved_sp macro to
optionally store the fetched value right into sp and store the
old SP value into K0. Then it's just a matter of subtracting
the frame from SP and storing the old SP from K0.
This required changing the DADDI workaround a bit, since K0
holds the SP, we had to use K1 for AT. But it eliminated
some of the special handling for the DADDI workaround.
Saving the RA register was moved up to before fetching the
CP0_EPC register, so the CP0_EPC register could be stored
into RA and the saved. This lets the traceback code know
where RA is actually stored.
Signed-off-by: Corey Minyard <cminyard@mvista.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/16991/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/asm.h')
0 files changed, 0 insertions, 0 deletions