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| author | Mark Rutland <mark.rutland@arm.com> | 2023-06-05 09:01:01 +0200 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2023-06-05 09:57:14 +0200 |
| commit | d12157efc8e083c77d054675fcdd594f54cc7e2b (patch) | |
| tree | 9be23f46b4b8db9d3e36a8b551d8961d8d41822d /arch/mips/include/asm/atomic.h | |
| parent | locking/atomic: hexagon: remove redundant arch_atomic_cmpxchg (diff) | |
| download | linux-d12157efc8e083c77d054675fcdd594f54cc7e2b.tar.xz linux-d12157efc8e083c77d054675fcdd594f54cc7e2b.zip | |
locking/atomic: make atomic*_{cmp,}xchg optional
Most architectures define the atomic/atomic64 xchg and cmpxchg
operations in terms of arch_xchg and arch_cmpxchg respectfully.
Add fallbacks for these cases and remove the trivial cases from arch
code. On some architectures the existing definitions are kept as these
are used to build other arch_atomic*() operations.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Kees Cook <keescook@chromium.org>
Link: https://lore.kernel.org/r/20230605070124.3741859-5-mark.rutland@arm.com
Diffstat (limited to 'arch/mips/include/asm/atomic.h')
| -rw-r--r-- | arch/mips/include/asm/atomic.h | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/arch/mips/include/asm/atomic.h b/arch/mips/include/asm/atomic.h index 712fb5a6a568..ba188e77768b 100644 --- a/arch/mips/include/asm/atomic.h +++ b/arch/mips/include/asm/atomic.h @@ -33,17 +33,6 @@ static __always_inline void arch_##pfx##_set(pfx##_t *v, type i) \ { \ WRITE_ONCE(v->counter, i); \ } \ - \ -static __always_inline type \ -arch_##pfx##_cmpxchg(pfx##_t *v, type o, type n) \ -{ \ - return arch_cmpxchg(&v->counter, o, n); \ -} \ - \ -static __always_inline type arch_##pfx##_xchg(pfx##_t *v, type n) \ -{ \ - return arch_xchg(&v->counter, n); \ -} ATOMIC_OPS(atomic, int) |