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| author | Paul Burton <paul.burton@mips.com> | 2019-10-01 23:53:26 +0200 |
|---|---|---|
| committer | Paul Burton <paul.burton@mips.com> | 2019-10-07 18:42:39 +0200 |
| commit | 3d2920cf4fd41a27730083ef395a0c49d4750474 (patch) | |
| tree | b39ad6da2c40a4ee7c29892f319cf7938d5bd6d6 /arch/mips/include/asm/bitops.h | |
| parent | MIPS: bitops: Handle !kernel_uses_llsc first (diff) | |
| download | linux-3d2920cf4fd41a27730083ef395a0c49d4750474.tar.xz linux-3d2920cf4fd41a27730083ef395a0c49d4750474.zip | |
MIPS: bitops: Only use ins for bit 16 or higher
set_bit() can set bits 0-15 using an ori instruction, rather than
loading the value -1 into a register & then using an ins instruction.
That is, rather than the following:
li t0, -1
ll t1, 0(t2)
ins t1, t0, 4, 1
sc t1, 0(t2)
We can have the simpler:
ll t1, 0(t2)
ori t1, t1, 0x10
sc t1, 0(t2)
The or path already allows immediates to be used, so simply restricting
the ins path to bits that don't fit in immediates is sufficient to take
advantage of this.
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
Cc: Huacai Chen <chenhc@lemote.com>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: linux-kernel@vger.kernel.org
Diffstat (limited to 'arch/mips/include/asm/bitops.h')
| -rw-r--r-- | arch/mips/include/asm/bitops.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h index e300960717e0..1e5739191ddf 100644 --- a/arch/mips/include/asm/bitops.h +++ b/arch/mips/include/asm/bitops.h @@ -77,7 +77,7 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr) } #if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6) - if (__builtin_constant_p(bit)) { + if (__builtin_constant_p(bit) && (bit >= 16)) { loongson_llsc_mb(); do { __asm__ __volatile__( |