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| author | Ralf Baechle <ralf@linux-mips.org> | 2014-04-29 15:21:24 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-05-23 15:12:37 +0200 |
| commit | 76fbfc318de2eb0eb4823095ece020f999a17c63 (patch) | |
| tree | 376004537e00adf3459c1e32a5ba82b5692a6a9f /arch/mips/include/asm/branch.h | |
| parent | MIPS: Disable MIPS16/microMIPS crap for platforms not supporting these ASEs. (diff) | |
| download | linux-76fbfc318de2eb0eb4823095ece020f999a17c63.tar.xz linux-76fbfc318de2eb0eb4823095ece020f999a17c63.zip | |
MIPS: Sort out mm_isBranchInstr.
mm_isBranchInstr() did reside in the math emu code even though it logically
is separate and also is used outside the math emu code. In addition GCC 4.9.0
leaves the following unnnecessarily bloated function body for a non-microMIPS
configuration:
<mm_isBranchInstr>:
105c: afa50004 sw a1,4(sp)
1060: afa60008 sw a2,8(sp)
1064: afa7000c sw a3,12(sp)
1068: 03e00008 jr ra
106c: 00001021 move v0,zero
which stores arguments that are never going to be used on the stack frame.
Move mm_isBranchInstr() from cp1emu.c to branch.c, then split mm_isBranchInstr()
into a __mm_isBranchInstr() core and a mm_isBranchInstr() wrapper inline function
which only invokes __mm_isBranchInstr() on microMIPS configurations.
This shaves off 112 bytes off the kernel and improves code flow a bit.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/branch.h')
| -rw-r--r-- | arch/mips/include/asm/branch.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/mips/include/asm/branch.h b/arch/mips/include/asm/branch.h index d109e34130f5..de781cf54bc7 100644 --- a/arch/mips/include/asm/branch.h +++ b/arch/mips/include/asm/branch.h @@ -20,6 +20,24 @@ extern int __compute_return_epc_for_insn(struct pt_regs *regs, extern int __microMIPS_compute_return_epc(struct pt_regs *regs); extern int __MIPS16e_compute_return_epc(struct pt_regs *regs); +/* + * microMIPS bitfields + */ +#define MM_POOL32A_MINOR_MASK 0x3f +#define MM_POOL32A_MINOR_SHIFT 0x6 +#define MM_MIPS32_COND_FC 0x30 + +extern int __mm_isBranchInstr(struct pt_regs *regs, + struct mm_decoded_insn dec_insn, unsigned long *contpc); + +static inline int mm_isBranchInstr(struct pt_regs *regs, + struct mm_decoded_insn dec_insn, unsigned long *contpc) +{ + if (!cpu_has_mmips) + return 0; + + return __mm_isBranchInstr(regs, dec_insn, contpc); +} static inline int delay_slot(struct pt_regs *regs) { |