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author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-18 23:28:48 +0100 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-18 23:28:48 +0100 |
commit | 5d7e8af3c5727626b9e7f909c778b9ac9b4a1809 (patch) | |
tree | 13d51e31ee070113538a6d26d9a52503ba4a3cd0 /arch/mips/include/asm/cpu-info.h | |
parent | Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/pa... (diff) | |
parent | MIPS: Malta: enable Cirrus FB console (diff) | |
download | linux-5d7e8af3c5727626b9e7f909c778b9ac9b4a1809.tar.xz linux-5d7e8af3c5727626b9e7f909c778b9ac9b4a1809.zip |
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus: (26 commits)
MIPS: Malta: enable Cirrus FB console
MIPS: add CONFIG_VIRTUALIZATION for virtio support
MIPS: Implement __read_mostly
MIPS: ath79: add common WMAC device for AR913X based boards
MIPS: ath79: Add initial support for the Atheros AP81 reference board
MIPS: ath79: add common SPI controller device
SPI: Add SPI controller driver for the Atheros AR71XX/AR724X/AR913X SoCs
MIPS: ath79: add common GPIO buttons device
MIPS: ath79: add common watchdog device
MIPS: ath79: add common GPIO LEDs device
MIPS: ath79: add initial support for the Atheros PB44 reference board
MIPS: ath79: utilize the MIPS multi-machine support
MIPS: ath79: add GPIOLIB support
MIPS: Add initial support for the Atheros AR71XX/AR724X/AR931X SoCs
MIPS: jump label: Add MIPS support.
MIPS: Use WARN() in uasm for better diagnostics.
MIPS: Optimize TLB handlers for Octeon CPUs
MIPS: Add LDX and LWX instructions to uasm.
MIPS: Use BBIT instructions in TLB handlers
MIPS: Declare uasm bbit0 and bbit1 functions.
...
Diffstat (limited to 'arch/mips/include/asm/cpu-info.h')
-rw-r--r-- | arch/mips/include/asm/cpu-info.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h index b39def3f6e03..c454550eb0c0 100644 --- a/arch/mips/include/asm/cpu-info.h +++ b/arch/mips/include/asm/cpu-info.h @@ -78,6 +78,7 @@ struct cpuinfo_mips { unsigned int watch_reg_use_cnt; /* Usable by ptrace */ #define NUM_WATCH_REGS 4 u16 watch_reg_masks[NUM_WATCH_REGS]; + unsigned int kscratch_mask; /* Usable KScratch mask. */ } __attribute__((aligned(SMP_CACHE_BYTES))); extern struct cpuinfo_mips cpu_data[]; |