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authorRalf Baechle <ralf@linux-mips.org>2012-09-28 16:29:55 +0200
committerRalf Baechle <ralf@linux-mips.org>2012-09-28 16:29:55 +0200
commitcb418b34caddc970c1513e515aaa535246a4bba3 (patch)
treeb89720b74d6a85a9407f03bb064248c7235b9dea /arch/mips/include/asm/cpu.h
parentMerge branch 'rixi-3.7' of git://git.linux-mips.org/pub/scm/sjhill/linux-sjhi... (diff)
parentMIPS: Optimise TLB handlers for MIPS32/64 R2 cores. (diff)
downloadlinux-cb418b34caddc970c1513e515aaa535246a4bba3.tar.xz
linux-cb418b34caddc970c1513e515aaa535246a4bba3.zip
Merge branch 'ralf-3.7' of git://git.linux-mips.org/pub/scm/sjhill/linux-sjhill into mips-for-linux-next
Diffstat (limited to 'arch/mips/include/asm/cpu.h')
-rw-r--r--arch/mips/include/asm/cpu.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index 1037d54f0597..554e2d29965d 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -94,6 +94,7 @@
#define PRID_IMP_24KE 0x9600
#define PRID_IMP_74K 0x9700
#define PRID_IMP_1004K 0x9900
+#define PRID_IMP_1074K 0x9a00
#define PRID_IMP_M14KC 0x9c00
/*