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authorSteven J. Hill <sjhill@mips.com>2012-12-07 04:51:04 +0100
committerJohn Crispin <blogic@openwrt.org>2013-02-17 01:25:21 +0100
commit778eeb1b199b85bec79b49ac483b013e270636ea (patch)
tree51a33ec4e5e81296f31fef98b89253855dc2368d /arch/mips/include/asm/gic.h
parentMIPS: dsp: Simplify the DSP macros. (diff)
downloadlinux-778eeb1b199b85bec79b49ac483b013e270636ea.tar.xz
linux-778eeb1b199b85bec79b49ac483b013e270636ea.zip
MIPS: Add new GIC clocksource.
Add new clocksource that uses the counter present on the MIPS Global Interrupt Controller. Signed-off-by: Steven J. Hill <sjhill@mips.com> Patchwork: http://patchwork.linux-mips.org/patch/4681/ Signed-off-by: John Crispin <blogic@openwrt.org>
Diffstat (limited to 'arch/mips/include/asm/gic.h')
-rw-r--r--arch/mips/include/asm/gic.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/include/asm/gic.h b/arch/mips/include/asm/gic.h
index 37620db588be..bbddd257c243 100644
--- a/arch/mips/include/asm/gic.h
+++ b/arch/mips/include/asm/gic.h
@@ -359,6 +359,7 @@ struct gic_shared_intr_map {
/* Mapped interrupt to pin X, then GIC will generate the vector (X+1). */
#define GIC_PIN_TO_VEC_OFFSET (1)
+extern int gic_present;
extern unsigned long _gic_base;
extern unsigned int gic_irq_base;
extern unsigned int gic_irq_flags[];