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| author | James Hogan <james.hogan@imgtec.com> | 2017-03-14 11:15:33 +0100 |
|---|---|---|
| committer | James Hogan <james.hogan@imgtec.com> | 2017-03-28 15:53:55 +0200 |
| commit | edc89260d474fd044e77b7039bd2a697dddcac6c (patch) | |
| tree | 52b87d2e49bb8677def407489f3586d34e12abe7 /arch/mips/include/asm/kvm_host.h | |
| parent | KVM: MIPS: Add VZ support to build system (diff) | |
| download | linux-edc89260d474fd044e77b7039bd2a697dddcac6c.tar.xz linux-edc89260d474fd044e77b7039bd2a697dddcac6c.zip | |
KVM: MIPS/VZ: Support guest CP0_BadInstr[P]
Add support for VZ guest CP0_BadInstr and CP0_BadInstrP registers, as
found on most VZ capable cores. These guest registers need context
switching, and exposing via the KVM ioctl API when they are present.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Radim Krčmář" <rkrcmar@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
Cc: linux-doc@vger.kernel.org
Diffstat (limited to 'arch/mips/include/asm/kvm_host.h')
| -rw-r--r-- | arch/mips/include/asm/kvm_host.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/mips/include/asm/kvm_host.h b/arch/mips/include/asm/kvm_host.h index bc3f9dedaac8..3a9ca3326315 100644 --- a/arch/mips/include/asm/kvm_host.h +++ b/arch/mips/include/asm/kvm_host.h @@ -40,6 +40,8 @@ #define KVM_REG_MIPS_CP0_WIRED MIPS_CP0_32(6, 0) #define KVM_REG_MIPS_CP0_HWRENA MIPS_CP0_32(7, 0) #define KVM_REG_MIPS_CP0_BADVADDR MIPS_CP0_64(8, 0) +#define KVM_REG_MIPS_CP0_BADINSTR MIPS_CP0_32(8, 1) +#define KVM_REG_MIPS_CP0_BADINSTRP MIPS_CP0_32(8, 2) #define KVM_REG_MIPS_CP0_COUNT MIPS_CP0_32(9, 0) #define KVM_REG_MIPS_CP0_ENTRYHI MIPS_CP0_64(10, 0) #define KVM_REG_MIPS_CP0_COMPARE MIPS_CP0_32(11, 0) @@ -669,6 +671,8 @@ __BUILD_KVM_RW_HW(pagegrain, 32, MIPS_CP0_TLB_PG_MASK, 1) __BUILD_KVM_RW_HW(wired, 32, MIPS_CP0_TLB_WIRED, 0) __BUILD_KVM_RW_HW(hwrena, 32, MIPS_CP0_HWRENA, 0) __BUILD_KVM_RW_HW(badvaddr, l, MIPS_CP0_BAD_VADDR, 0) +__BUILD_KVM_RW_HW(badinstr, 32, MIPS_CP0_BAD_VADDR, 1) +__BUILD_KVM_RW_HW(badinstrp, 32, MIPS_CP0_BAD_VADDR, 2) __BUILD_KVM_RW_SW(count, 32, MIPS_CP0_COUNT, 0) __BUILD_KVM_RW_HW(entryhi, l, MIPS_CP0_TLB_HI, 0) __BUILD_KVM_RW_HW(compare, 32, MIPS_CP0_COMPARE, 0) |