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authorH. Peter Anvin <hpa@zytor.com>2009-08-27 02:17:51 +0200
committerH. Peter Anvin <hpa@zytor.com>2009-08-27 02:24:28 +0200
commitb855192c08fcb14adbc5d3a7cab182022d433cca (patch)
tree3a10cafbfbf98cafacf667eb218c71300b351bfa /arch/mips/include/asm/mach-ar7/war.h
parentx86, pat: Sanity check remap_pfn_range for RAM region (diff)
parentx86: Fix an incorrect argument of reserve_bootmem() (diff)
downloadlinux-b855192c08fcb14adbc5d3a7cab182022d433cca.tar.xz
linux-b855192c08fcb14adbc5d3a7cab182022d433cca.zip
Merge branch 'x86/urgent' into x86/pat
Reason: Change to is_new_memtype_allowed() in x86/urgent Resolved semantic conflicts in: arch/x86/mm/pat.c arch/x86/mm/ioremap.c Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/mips/include/asm/mach-ar7/war.h')
-rw-r--r--arch/mips/include/asm/mach-ar7/war.h25
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-ar7/war.h b/arch/mips/include/asm/mach-ar7/war.h
new file mode 100644
index 000000000000..f4862b563080
--- /dev/null
+++ b/arch/mips/include/asm/mach-ar7/war.h
@@ -0,0 +1,25 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
+ */
+#ifndef __ASM_MIPS_MACH_AR7_WAR_H
+#define __ASM_MIPS_MACH_AR7_WAR_H
+
+#define R4600_V1_INDEX_ICACHEOP_WAR 0
+#define R4600_V1_HIT_CACHEOP_WAR 0
+#define R4600_V2_HIT_CACHEOP_WAR 0
+#define R5432_CP0_INTERRUPT_WAR 0
+#define BCM1250_M3_WAR 0
+#define SIBYTE_1956_WAR 0
+#define MIPS4K_ICACHE_REFILL_WAR 0
+#define MIPS_CACHE_SYNC_WAR 0
+#define TX49XX_ICACHE_INDEX_INV_WAR 0
+#define RM9000_CDEX_SMP_WAR 0
+#define ICACHE_REFILLS_WORKAROUND_WAR 0
+#define R10000_LLSC_WAR 0
+#define MIPS34K_MISSED_ITLB_WAR 0
+
+#endif /* __ASM_MIPS_MACH_AR7_WAR_H */