summaryrefslogtreecommitdiffstats
path: root/arch/mips/include/asm/mach-ath79
diff options
context:
space:
mode:
authorGabor Juhos <juhosg@openwrt.org>2012-03-14 10:36:06 +0100
committerRalf Baechle <ralf@linux-mips.org>2012-05-15 17:49:03 +0200
commit93ef85b5598ad2cc23f38d97ed565027b969c0aa (patch)
treed8d0744cd0f50d5b753396196bc0329fac211966 /arch/mips/include/asm/mach-ath79
parentMIPS: ath79: add a workaround for a PCI controller bug in AR7240 SoCs (diff)
downloadlinux-93ef85b5598ad2cc23f38d97ed565027b969c0aa.tar.xz
linux-93ef85b5598ad2cc23f38d97ed565027b969c0aa.zip
MIPS: ath79: fix a wrong IRQ number
The Ubiquiti XM board setup code uses an invalid IRQ number, because it if above of NR_IRQS. This leads to failed 'request_irq' calls: ath9k 0000:00:00.0: request_irq failed ath9k: probe of 0000:00:00.0 failed with error -22 Preserve some IRQ numbers for the built-in IRQ controller of PCI host controllers in the AR71XX/AR724X SoCs, and use the correct IRQ number in the board setup code. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3495/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mach-ath79')
-rw-r--r--arch/mips/include/asm/mach-ath79/irq.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/mips/include/asm/mach-ath79/irq.h b/arch/mips/include/asm/mach-ath79/irq.h
index 519958fe4e3c..6ae2646da4f4 100644
--- a/arch/mips/include/asm/mach-ath79/irq.h
+++ b/arch/mips/include/asm/mach-ath79/irq.h
@@ -10,11 +10,15 @@
#define __ASM_MACH_ATH79_IRQ_H
#define MIPS_CPU_IRQ_BASE 0
-#define NR_IRQS 40
+#define NR_IRQS 46
#define ATH79_MISC_IRQ_BASE 8
#define ATH79_MISC_IRQ_COUNT 32
+#define ATH79_PCI_IRQ_BASE (ATH79_MISC_IRQ_BASE + ATH79_MISC_IRQ_COUNT)
+#define ATH79_PCI_IRQ_COUNT 6
+#define ATH79_PCI_IRQ(_x) (ATH79_PCI_IRQ_BASE + (_x))
+
#define ATH79_CPU_IRQ_IP2 (MIPS_CPU_IRQ_BASE + 2)
#define ATH79_CPU_IRQ_USB (MIPS_CPU_IRQ_BASE + 3)
#define ATH79_CPU_IRQ_GE0 (MIPS_CPU_IRQ_BASE + 4)