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authorpascal@pabr.org <pascal@pabr.org>2010-01-03 13:39:12 +0100
committerRalf Baechle <ralf@linux-mips.org>2010-02-27 12:53:17 +0100
commit60ec6571c5072cdea9e518d1dac8147b85ca93a2 (patch)
tree7543987848f6c00467bb5adea4ccfe096faf8835 /arch/mips/include/asm/mach-au1x00
parentMIPS: Loongson: Cleanup the halt and poweroff action (diff)
downloadlinux-60ec6571c5072cdea9e518d1dac8147b85ca93a2.tar.xz
linux-60ec6571c5072cdea9e518d1dac8147b85ca93a2.zip
MIPS: Support 36-bit iomem on 32-bit Au1x00
I believe these changes are needed on Alchemy SoCs in order to use iomem above 4G with the usual platform_device machinery: - Set CONFIG_ARCH_PHYS_ADDR_T_64BIT to make resource_size_t 64-bit. - Increase IOMEM_RESOURCE_END so that platforms can register resources. To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/814/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mach-au1x00')
-rw-r--r--arch/mips/include/asm/mach-au1x00/au1000.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/include/asm/mach-au1x00/au1000.h b/arch/mips/include/asm/mach-au1x00/au1000.h
index 088c8e0f43bb..2805fc56484d 100644
--- a/arch/mips/include/asm/mach-au1x00/au1000.h
+++ b/arch/mips/include/asm/mach-au1x00/au1000.h
@@ -1659,7 +1659,7 @@ enum soc_au1200_ints {
#define IOPORT_RESOURCE_START 0x00001000 /* skip legacy probing */
#define IOPORT_RESOURCE_END 0xffffffff
#define IOMEM_RESOURCE_START 0x10000000
-#define IOMEM_RESOURCE_END 0xffffffff
+#define IOMEM_RESOURCE_END 0xfffffffffULL
#else /* Au1000 and Au1100 and Au1200 */
@@ -1667,7 +1667,7 @@ enum soc_au1200_ints {
#define IOPORT_RESOURCE_START 0x10000000
#define IOPORT_RESOURCE_END 0xffffffff
#define IOMEM_RESOURCE_START 0x10000000
-#define IOMEM_RESOURCE_END 0xffffffff
+#define IOMEM_RESOURCE_END 0xfffffffffULL
#define PCI_IO_START 0
#define PCI_IO_END 0