diff options
| author | David Daney <david.daney@cavium.com> | 2011-07-06 01:35:53 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2011-09-24 01:44:41 +0200 |
| commit | 2f19d080fb14bdddf11bf54d4db6306235c46c99 (patch) | |
| tree | 1f72ba77d0f67af01abd17bf6bff12d1d9121942 /arch/mips/include/asm/mach-cavium-octeon | |
| parent | MIPS: No branches in delay slots for huge pages in handle_tlbl (diff) | |
| download | linux-2f19d080fb14bdddf11bf54d4db6306235c46c99.tar.xz linux-2f19d080fb14bdddf11bf54d4db6306235c46c99.zip | |
MIPS: Octeon: Enable C0_UserLocal probing.
Octeon2 processor cores have a UserLocal register. Remove the hard
coded negative probe and allow the standard probing to detect this
feature.
Signed-off-by: David Daney <david.daney@cavium.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2578/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mach-cavium-octeon')
| -rw-r--r-- | arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h index 0d5a42b5f47a..a58addb98cfd 100644 --- a/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h +++ b/arch/mips/include/asm/mach-cavium-octeon/cpu-feature-overrides.h @@ -54,7 +54,6 @@ #define cpu_has_mips_r2_exec_hazard 0 #define cpu_has_dsp 0 #define cpu_has_mipsmt 0 -#define cpu_has_userlocal 0 #define cpu_has_vint 0 #define cpu_has_veic 0 #define cpu_hwrena_impl_bits 0xc0000000 |