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authorDavid Daney <david.daney@cavium.com>2012-07-05 18:12:37 +0200
committerRalf Baechle <ralf@linux-mips.org>2012-07-23 14:54:52 +0200
commit0b28b823ac5bd4f9b2876ce9432ff2006c529f06 (patch)
treea57f0244ea78298e93a8fec371f648ac14693912 /arch/mips/include/asm/mach-cavium-octeon
parentMIPS: Octeon: Add irq handlers for GPIO interrupts. (diff)
downloadlinux-0b28b823ac5bd4f9b2876ce9432ff2006c529f06.tar.xz
linux-0b28b823ac5bd4f9b2876ce9432ff2006c529f06.zip
MIPS: Octeon: Remove use of OCTEON_IRQ_RST.
This symbol will be removed, so don't use it as part of the definition of OCTEON_IRQ_LAST. Set OCTEON_IRQ_LAST to 127 so there is space for all the automatically allocated (via irq_domain) irqs. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3946/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mach-cavium-octeon')
-rw-r--r--arch/mips/include/asm/mach-cavium-octeon/irq.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/mips/include/asm/mach-cavium-octeon/irq.h b/arch/mips/include/asm/mach-cavium-octeon/irq.h
index 5b05f186e395..81a032490b92 100644
--- a/arch/mips/include/asm/mach-cavium-octeon/irq.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/irq.h
@@ -86,6 +86,9 @@ enum octeon_irq {
OCTEON_IRQ_LMC0,
OCTEON_IRQ_DFM = OCTEON_IRQ_LMC0 + 4, /* Summary of DFM */
OCTEON_IRQ_RST,
+#ifndef CONFIG_PCI_MSI
+ OCTEON_IRQ_LAST = 127
+#endif
};
#ifdef CONFIG_PCI_MSI
@@ -94,8 +97,6 @@ enum octeon_irq {
#define OCTEON_IRQ_MSI_LAST (OCTEON_IRQ_MSI_BIT0 + 255)
#define OCTEON_IRQ_LAST (OCTEON_IRQ_MSI_LAST + 1)
-#else
-#define OCTEON_IRQ_LAST (OCTEON_IRQ_RST + 1)
#endif
#endif