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authorShinya Kuribayashi <skuribay@pobox.com>2010-07-12 17:41:51 +0200
committerRalf Baechle <ralf@linux-mips.org>2011-07-25 18:26:55 +0200
commit5fba0960809534f008260a621046f38a5f46f417 (patch)
treecf0bdaefabf7b24088c1dd38a3b255ead4b171c6 /arch/mips/include/asm/mach-mipssim
parentMIPS: PowerTV: Provide cpu-feature-overrides.h (diff)
downloadlinux-5fba0960809534f008260a621046f38a5f46f417.tar.xz
linux-5fba0960809534f008260a621046f38a5f46f417.zip
MIPS: Enable cpu_has_clo_clz for MIPS Technologies' platforms
Enable cpu_has_clo_clz only when CONFIG_CPU_MIPS32 or CONFIG_CPU_MIPS64 is selected. This will optimize fls() and __fls() to use CLZ insn, and eventually ffs() and __ffs() as well. Malta and MIPSSim are development platforms, and need to take care of various processor configurations, release rivisions and so on, even across different MIPS ISAs. For such platforms we have to be careful, for instance, with turning on cpu_has_mips{32,64}r[12] features. As for CLZ, all MIPS32/64 processors support it, regardless of release revisions. Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com> To: David VomLehn <dvomlehn@cisco.com> To: macro@linux-mips.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1453/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mach-mipssim')
-rw-r--r--arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h b/arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h
index 779b02205737..27aaaa5d925e 100644
--- a/arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-mipssim/cpu-feature-overrides.h
@@ -31,6 +31,7 @@
/* #define cpu_has_vtag_icache ? */
/* #define cpu_has_dc_aliases ? */
/* #define cpu_has_ic_fills_f_dc ? */
+#define cpu_has_clo_clz 1
#define cpu_has_nofpuex 0
/* #define cpu_has_64bits ? */
/* #define cpu_has_64bit_zero_reg ? */
@@ -56,6 +57,7 @@
/* #define cpu_has_vtag_icache ? */
/* #define cpu_has_dc_aliases ? */
/* #define cpu_has_ic_fills_f_dc ? */
+#define cpu_has_clo_clz 1
#define cpu_has_nofpuex 0
/* #define cpu_has_64bits ? */
/* #define cpu_has_64bit_zero_reg ? */