diff options
| author | Jayachandran C <jayachandranc@netlogicmicro.com> | 2011-05-06 22:06:05 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2011-05-19 10:55:39 +0200 |
| commit | 3c595a515dbb61ae96e8f5607d895820aa06e870 (patch) | |
| tree | 958f06dfc43abd8797a6acbf04e251a871fdffcb /arch/mips/include/asm/mach-netlogic/war.h | |
| parent | MIPS: Netlogic XLR/XLS processor IDs. (diff) | |
| download | linux-3c595a515dbb61ae96e8f5607d895820aa06e870.tar.xz linux-3c595a515dbb61ae96e8f5607d895820aa06e870.zip | |
MIPS: Netlogic: mach-netlogic include files
Add war.h and irq.h with XLR/XLS definitions.
Signed-off-by: Jayachandran C <jayachandranc@netlogicmicro.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2331/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mach-netlogic/war.h')
| -rw-r--r-- | arch/mips/include/asm/mach-netlogic/war.h | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-netlogic/war.h b/arch/mips/include/asm/mach-netlogic/war.h new file mode 100644 index 000000000000..22da89327352 --- /dev/null +++ b/arch/mips/include/asm/mach-netlogic/war.h @@ -0,0 +1,26 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2011 Netlogic Microsystems. + * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org> + */ +#ifndef __ASM_MIPS_MACH_NLM_WAR_H +#define __ASM_MIPS_MACH_NLM_WAR_H + +#define R4600_V1_INDEX_ICACHEOP_WAR 0 +#define R4600_V1_HIT_CACHEOP_WAR 0 +#define R4600_V2_HIT_CACHEOP_WAR 0 +#define R5432_CP0_INTERRUPT_WAR 0 +#define BCM1250_M3_WAR 0 +#define SIBYTE_1956_WAR 0 +#define MIPS4K_ICACHE_REFILL_WAR 0 +#define MIPS_CACHE_SYNC_WAR 0 +#define TX49XX_ICACHE_INDEX_INV_WAR 0 +#define RM9000_CDEX_SMP_WAR 0 +#define ICACHE_REFILLS_WORKAROUND_WAR 0 +#define R10000_LLSC_WAR 0 +#define MIPS34K_MISSED_ITLB_WAR 0 + +#endif /* __ASM_MIPS_MACH_NLM_WAR_H */ |