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| author | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-08-24 18:32:48 +0200 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-09-07 22:24:19 +0200 |
| commit | 886ee1363a3ad2b890959f07cffe8d91d995b93a (patch) | |
| tree | cfc912405501a4508cc56c6b9b73f4407cc37187 /arch/mips/include/asm/mach-tx49xx | |
| parent | MIPS: Convert TX49XX_ICACHE_INDEX_INV into a config option (diff) | |
| download | linux-886ee1363a3ad2b890959f07cffe8d91d995b93a.tar.xz linux-886ee1363a3ad2b890959f07cffe8d91d995b93a.zip | |
MIPS: Convert ICACHE_REFILLS_WORKAROUND_WAR into a config option
Use a new config option to enable I-cache refill workaround and remove
define from different war.h files.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/include/asm/mach-tx49xx')
| -rw-r--r-- | arch/mips/include/asm/mach-tx49xx/war.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/mips/include/asm/mach-tx49xx/war.h b/arch/mips/include/asm/mach-tx49xx/war.h index 9293c5f9ffb2..5768889c20a7 100644 --- a/arch/mips/include/asm/mach-tx49xx/war.h +++ b/arch/mips/include/asm/mach-tx49xx/war.h @@ -10,7 +10,6 @@ #define BCM1250_M3_WAR 0 #define SIBYTE_1956_WAR 0 -#define ICACHE_REFILLS_WORKAROUND_WAR 0 #define R10000_LLSC_WAR 0 #define MIPS34K_MISSED_ITLB_WAR 0 |