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authorRalf Baechle <ralf@linux-mips.org>2013-01-22 12:59:30 +0100
committerRalf Baechle <ralf@linux-mips.org>2013-02-01 10:00:22 +0100
commit7034228792cc561e79ff8600f02884bd4c80e287 (patch)
tree89b77af37d087d9de236fc5d21f60bf552d0a2c6 /arch/mips/include/asm/pci.h
parentMIPS: Nuke empty lines at end of files. (diff)
downloadlinux-7034228792cc561e79ff8600f02884bd4c80e287.tar.xz
linux-7034228792cc561e79ff8600f02884bd4c80e287.zip
MIPS: Whitespace cleanup.
Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/pci.h')
-rw-r--r--arch/mips/include/asm/pci.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h
index d69ea743272b..e224876cc344 100644
--- a/arch/mips/include/asm/pci.h
+++ b/arch/mips/include/asm/pci.h
@@ -12,7 +12,7 @@
/*
* This file essentially defines the interface between board
- * specific PCI code and MIPS common PCI code. Should potentially put
+ * specific PCI code and MIPS common PCI code. Should potentially put
* into include/asm/pci.h file.
*/
@@ -20,7 +20,7 @@
#include <linux/of.h>
/*
- * Each pci channel is a top-level PCI bus seem by CPU. A machine with
+ * Each pci channel is a top-level PCI bus seem by CPU. A machine with
* multiple PCI channels may have multiple PCI host controllers or a
* single controller supporting multiple channels.
*/
@@ -99,7 +99,7 @@ extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
struct pci_dev;
/*
- * The PCI address space does equal the physical memory address space. The
+ * The PCI address space does equal the physical memory address space. The
* networking and block device layers use this boolean for bounce buffer
* decisions. This is set if any hose does not have an IOMMU.
*/