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author | John Crispin <blogic@openwrt.org> | 2012-05-04 10:50:13 +0200 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2012-05-15 17:49:19 +0200 |
commit | a48cf37ac8a77ddd2370be3c9af411c622ebc425 (patch) | |
tree | 7326beae68f1fafd924b9436ec2c1551e36f94b8 /arch/mips/include/asm/pci.h | |
parent | MIPS: make oprofile use cp0_perfcount_irq if it is set (diff) | |
download | linux-a48cf37ac8a77ddd2370be3c9af411c622ebc425.tar.xz linux-a48cf37ac8a77ddd2370be3c9af411c622ebc425.zip |
MIPS: pci: parse memory ranges from devicetree
Implement pci_load_of_ranges on MIPS. Due to lack of test hardware only 32bit
bus width is supported. This function is based on pci_process_bridge_OF_ranges
from powerpc.
Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3729/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/pci.h')
-rw-r--r-- | arch/mips/include/asm/pci.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h index fcd4060f6421..90bf3b3fce19 100644 --- a/arch/mips/include/asm/pci.h +++ b/arch/mips/include/asm/pci.h @@ -17,6 +17,7 @@ */ #include <linux/ioport.h> +#include <linux/of.h> /* * Each pci channel is a top-level PCI bus seem by CPU. A machine with @@ -26,6 +27,7 @@ struct pci_controller { struct pci_controller *next; struct pci_bus *bus; + struct device_node *of_node; struct pci_ops *pci_ops; struct resource *mem_resource; @@ -142,4 +144,8 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) extern char * (*pcibios_plat_setup)(char *str); +/* this function parses memory ranges from a device node */ +extern void __devinit pci_load_of_ranges(struct pci_controller *hose, + struct device_node *node); + #endif /* _ASM_PCI_H */ |