diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2015-07-14 21:41:12 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2015-07-14 21:47:34 +0200 |
| commit | dd0bc75ee3ec4ef694c2d0483b6ffeed17141435 (patch) | |
| tree | 81bcaccf8c3a6c197707101f3da9d85fa8077431 /arch/mips/include/asm | |
| parent | MIPS: Require O32 FP64 support for MIPS64 with O32 compat (diff) | |
| download | linux-dd0bc75ee3ec4ef694c2d0483b6ffeed17141435.tar.xz linux-dd0bc75ee3ec4ef694c2d0483b6ffeed17141435.zip | |
MIPS: SB1: Remove support for Pass 1 parts.
Pass 1 parts had a number of significant erratas and were only available
in small numbers and under NDA. Full support also required the use of a
special toolchain that kept branches properly aligned. These workarounds
were never upstreamed and the only toolchain known to have them is
Montavista's GCC 3.0-based toolchain which completly obsoleted if not
useless these days.
So now that automated testing has tripped over the user of the
-msb1-pass1-workarounds option, rather than fixing it remove support for
pass 1 parts.
Probably nobody will notice. I seem to own the last know pass 1 board
and I haven't noticed another one in the wild in the past decade, at
least.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm')
| -rw-r--r-- | arch/mips/include/asm/mach-sibyte/war.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/mips/include/asm/mach-sibyte/war.h b/arch/mips/include/asm/mach-sibyte/war.h index 0a227d426b9c..520f8fc2c806 100644 --- a/arch/mips/include/asm/mach-sibyte/war.h +++ b/arch/mips/include/asm/mach-sibyte/war.h @@ -13,8 +13,7 @@ #define R4600_V2_HIT_CACHEOP_WAR 0 #define R5432_CP0_INTERRUPT_WAR 0 -#if defined(CONFIG_SB1_PASS_1_WORKAROUNDS) || \ - defined(CONFIG_SB1_PASS_2_WORKAROUNDS) +#if defined(CONFIG_SB1_PASS_2_WORKAROUNDS) #ifndef __ASSEMBLY__ extern int sb1250_m3_workaround_needed(void); |