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| author | Markos Chandras <markos.chandras@imgtec.com> | 2014-11-26 14:56:51 +0100 |
|---|---|---|
| committer | Markos Chandras <markos.chandras@imgtec.com> | 2015-02-17 16:37:34 +0100 |
| commit | 8467ca0122e20f3f8e73d34907b8b30461af5d4e (patch) | |
| tree | b2c543790a8035ff5bde5d8a93567459eca534c7 /arch/mips/include/uapi/asm/inst.h | |
| parent | MIPS: Emulate the new MIPS R6 B{L,G}T{Z,}{AL,}C instructions (diff) | |
| download | linux-8467ca0122e20f3f8e73d34907b8b30461af5d4e.tar.xz linux-8467ca0122e20f3f8e73d34907b8b30461af5d4e.zip | |
MIPS: Emulate the new MIPS R6 branch compact (BC) instruction
MIPS R6 uses the <R6 LWC2 opcode for the new BC instruction.
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Diffstat (limited to 'arch/mips/include/uapi/asm/inst.h')
| -rw-r--r-- | arch/mips/include/uapi/asm/inst.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h index 19d3bc1e6510..9ce5e34b9c64 100644 --- a/arch/mips/include/uapi/asm/inst.h +++ b/arch/mips/include/uapi/asm/inst.h @@ -31,7 +31,7 @@ enum major_op { lbu_op, lhu_op, lwr_op, lwu_op, sb_op, sh_op, swl_op, sw_op, sdl_op, sdr_op, swr_op, cache_op, - ll_op, lwc1_op, lwc2_op, pref_op, + ll_op, lwc1_op, lwc2_op, bc6_op = lwc2_op, pref_op, lld_op, ldc1_op, ldc2_op, ld_op, sc_op, swc1_op, swc2_op, major_3b_op, scd_op, sdc1_op, sdc2_op, sd_op |