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authorThomas Bogendoerfer <tbogendoerfer@suse.de>2020-01-09 13:33:49 +0100
committerPaul Burton <paulburton@kernel.org>2020-01-10 00:30:04 +0100
commit78691e4f17af55d786fe71a5771e5932dd50c319 (patch)
treee2cb66edc59e78ed2ce271bd2bbf3549f98f33bd /arch/mips/include
parentMIPS: SGI-IP27: Move all shared IP27 declarations to ip27-common.h (diff)
downloadlinux-78691e4f17af55d786fe71a5771e5932dd50c319.tar.xz
linux-78691e4f17af55d786fe71a5771e5932dd50c319.zip
MIPS: SGI-IP27: Only reserve interrupts used in Linux
Reduce number of reserved interrupts by removing bits copied from IRIX and not used by Linux. Signed-off-by: Thomas Bogendoerfer <tbogendoerfer@suse.de> Signed-off-by: Paul Burton <paulburton@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org
Diffstat (limited to 'arch/mips/include')
-rw-r--r--arch/mips/include/asm/sn/intr.h17
1 files changed, 0 insertions, 17 deletions
diff --git a/arch/mips/include/asm/sn/intr.h b/arch/mips/include/asm/sn/intr.h
index fc1348193957..3d6954d370dc 100644
--- a/arch/mips/include/asm/sn/intr.h
+++ b/arch/mips/include/asm/sn/intr.h
@@ -8,15 +8,6 @@
#ifndef __ASM_SN_INTR_H
#define __ASM_SN_INTR_H
-/* Number of interrupt levels associated with each interrupt register. */
-#define N_INTPEND_BITS 64
-
-#define INT_PEND0_BASELVL 0
-#define INT_PEND1_BASELVL 64
-
-#define N_INTPENDJUNK_BITS 8
-#define INTPENDJUNK_CLRBIT 0x80
-
/*
* Macros to manipulate the interrupt register on the calling hub chip.
*/
@@ -84,14 +75,6 @@ do { \
#define CPU_RESCHED_B_IRQ 8
#define CPU_CALL_A_IRQ 9
#define CPU_CALL_B_IRQ 10
-#define MSC_MESG_INTR 11
-#define BASE_PCI_IRQ 12
-
-/*
- * INT_PEND0 again, bits determined by hardware / hardcoded:
- */
-#define SDISK_INTR 63 /* SABLE name */
-#define IP_PEND0_6_63 63 /* What is this bit? */
/*
* INT_PEND1 hard-coded bits: