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author | Wu Zhangjin <wuzj@lemote.com> | 2009-06-04 14:27:10 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2009-06-17 12:06:31 +0200 |
commit | 363c55cae53742f3f685a1814912c6d4fda245b4 (patch) | |
tree | 3be662ed49bbc90c80c9faa5e71176209989d2ea /arch/mips/kernel/asm-offsets.c | |
parent | MIPS: Move Cavium CP0 hwrena impl bits to cpu-feature-overrides.h (diff) | |
download | linux-363c55cae53742f3f685a1814912c6d4fda245b4.tar.xz linux-363c55cae53742f3f685a1814912c6d4fda245b4.zip |
MIPS: Add hibernation support
[Ralf: SMP support requires CPU hotplugging which MIPS currently doesn't
support. As implemented in this patch cache and tlb flushing will also be
invoked with interrupts disabled so smp_call_function() will blow up in
charming ways. So limit to !SMP.]
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Reviewed-by: Yan Hua <yanh@lemote.com>
Reviewed-by: Arnaud Patard <apatard@mandriva.com>
Reviewed-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Wu Zhangjin <wuzj@lemote.com>
Signed-off-by: Hu Hongbing <huhb@lemote.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/asm-offsets.c')
-rw-r--r-- | arch/mips/kernel/asm-offsets.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c index c901c22d7ad0..8d006ec65677 100644 --- a/arch/mips/kernel/asm-offsets.c +++ b/arch/mips/kernel/asm-offsets.c @@ -14,6 +14,7 @@ #include <linux/mm.h> #include <linux/interrupt.h> #include <linux/kbuild.h> +#include <linux/suspend.h> #include <asm/ptrace.h> #include <asm/processor.h> @@ -326,3 +327,15 @@ void output_octeon_cop2_state_defines(void) BLANK(); } #endif + +#ifdef CONFIG_HIBERNATION +void output_pbe_defines(void) +{ + COMMENT(" Linux struct pbe offsets. "); + OFFSET(PBE_ADDRESS, pbe, address); + OFFSET(PBE_ORIG_ADDRESS, pbe, orig_address); + OFFSET(PBE_NEXT, pbe, next); + DEFINE(PBE_SIZE, sizeof(struct pbe)); + BLANK(); +} +#endif |