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author | Ralf Baechle <ralf@linux-mips.org> | 2005-07-14 09:34:18 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2005-10-29 20:31:51 +0200 |
commit | 8f40611d2b184ca5d525075d273854929cf8d1d0 (patch) | |
tree | 962ef8dfa515cee330f506dc4ceac83670d0f84e /arch/mips/kernel/cpu-probe.c | |
parent | Macros to access the register of processors using the new MIPS (diff) | |
download | linux-8f40611d2b184ca5d525075d273854929cf8d1d0.tar.xz linux-8f40611d2b184ca5d525075d273854929cf8d1d0.zip |
Detect the MIPS R2 vectored interrupt, external interrupt controller
options and the precense of the MT ASE.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/cpu-probe.c')
-rw-r--r-- | arch/mips/kernel/cpu-probe.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 53e4496de6b6..844126b39ed3 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -501,6 +501,12 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c) c->ases |= MIPS_ASE_SMARTMIPS; if (config3 & MIPS_CONF3_DSP) c->ases |= MIPS_ASE_DSP; + if (config3 & MIPS_CONF3_VINT) + c->options |= MIPS_CPU_VINT; + if (config3 & MIPS_CONF3_VEIC) + c->options |= MIPS_CPU_VEIC; + if (config3 & MIPS_CONF3_MT) + c->ases |= MIPS_ASE_MIPSMT; return config3 & MIPS_CONF_M; } |