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authorRalf Baechle <ralf@linux-mips.org>2012-09-28 16:29:55 +0200
committerRalf Baechle <ralf@linux-mips.org>2012-09-28 16:29:55 +0200
commitcb418b34caddc970c1513e515aaa535246a4bba3 (patch)
treeb89720b74d6a85a9407f03bb064248c7235b9dea /arch/mips/kernel/cpu-probe.c
parentMerge branch 'rixi-3.7' of git://git.linux-mips.org/pub/scm/sjhill/linux-sjhi... (diff)
parentMIPS: Optimise TLB handlers for MIPS32/64 R2 cores. (diff)
downloadlinux-cb418b34caddc970c1513e515aaa535246a4bba3.tar.xz
linux-cb418b34caddc970c1513e515aaa535246a4bba3.zip
Merge branch 'ralf-3.7' of git://git.linux-mips.org/pub/scm/sjhill/linux-sjhill into mips-for-linux-next
Diffstat (limited to 'arch/mips/kernel/cpu-probe.c')
-rw-r--r--arch/mips/kernel/cpu-probe.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 0beb75fb3980..bc58bd10a607 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -861,6 +861,10 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu)
c->cputype = CPU_1004K;
__cpu_name[cpu] = "MIPS 1004Kc";
break;
+ case PRID_IMP_1074K:
+ c->cputype = CPU_74K;
+ __cpu_name[cpu] = "MIPS 1074Kc";
+ break;
}
spram_config();