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authorRalf Baechle <ralf@linux-mips.org>2007-09-14 20:08:43 +0200
committerRalf Baechle <ralf@linux-mips.org>2007-09-14 20:08:43 +0200
commit50da469a79fa2152d824f25f5ad5962f4af4343d (patch)
treee05ba4976480cda10dca6aa5bae8b90784040eea /arch/mips/kernel/cpu-probe.c
parent[MIPS] Workaround for 4Kc machine check exception (diff)
downloadlinux-50da469a79fa2152d824f25f5ad5962f4af4343d.tar.xz
linux-50da469a79fa2152d824f25f5ad5962f4af4343d.zip
[MIPS] 20Kc: Disable use of WAIT instruction.
Another issue with 20Kc's WAIT, waiting for more details. With the 2.6.23 release immindent simply disable the use of WAIT instead of a more fancy workaround. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/cpu-probe.c')
-rw-r--r--arch/mips/kernel/cpu-probe.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 06448a9656dc..3e004161ebd5 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -199,7 +199,14 @@ static inline void check_wait(void)
if ((c->processor_id & 0xff) <= 0x64)
break;
- cpu_wait = r4k_wait;
+ /*
+ * Another rev is incremeting c0_count at a reduced clock
+ * rate while in WAIT mode. So we basically have the choice
+ * between using the cp0 timer as clocksource or avoiding
+ * the WAIT instruction. Until more details are known,
+ * disable the use of WAIT for 20Kc entirely.
+ cpu_wait = r4k_wait;
+ */
break;
case CPU_RM9000:
if ((c->processor_id & 0x00ff) >= 0x40)